/* ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. */ /* * This file has been automatically generated using ChibiStudio board * generator plugin. Do not edit manually. */ #ifndef BOARD_H #define BOARD_H /*===========================================================================*/ /* Driver constants. */ /*===========================================================================*/ /* * Setup for STMicroelectronics STM32L4R9I-Discovery board. */ /* * Board identifier. */ #define BOARD_ST_STM32L4R9I_DISCOVERY #define BOARD_NAME "STMicroelectronics STM32L4R9I-Discovery" /* * Board oscillators-related settings. */ #if !defined(STM32_LSECLK) #define STM32_LSECLK 32768U #endif #define STM32_LSEDRV (3U << 3U) #if !defined(STM32_HSECLK) #define STM32_HSECLK 16000000U #endif /* * Board voltages. * Required for performance limits calculation. */ #define STM32_VDD 300U /* * MCU type as defined in the ST header. */ #define STM32L4R9xx /* * IO pins assignments. */ #define GPIOA_PIN0 0U #define GPIOA_PIN1 1U #define GPIOA_STLINK_USART2_TX 2U #define GPIOA_STLINK_USART2_RX 3U #define GPIOA_PIN4 4U #define GPIOA_PIN5 5U #define GPIOA_PIN6 6U #define GPIOA_PIN7 7U #define GPIOA_PIN8 8U #define GPIOA_USB_OTGFS_VBUS 9U #define GPIOA_USB_OTGFS_ID 10U #define GPIOA_USB_OTGFS_DM 11U #define GPIOA_USB_OTGFS_DP 12U #define GPIOA_SWDIO 13U #define GPIOA_SWCLK 14U #define GPIOA_PIN15 15U #define GPIOB_PIN0 0U #define GPIOB_PIN1 1U #define GPIOB_PIN2 2U #define GPIOB_SWO 3U #define GPIOB_PIN4 4U #define GPIOB_PIN5 5U #define GPIOB_PIN6 6U #define GPIOB_PIN7 7U #define GPIOB_PIN8 8U #define GPIOB_PIN9 9U #define GPIOB_PIN10 10U #define GPIOB_PIN11 11U #define GPIOB_PIN12 12U #define GPIOB_PIN13 13U #define GPIOB_PIN14 14U #define GPIOB_PIN15 15U #define GPIOC_PIN0 0U #define GPIOC_PIN1 1U #define GPIOC_PIN2 2U #define GPIOC_PIN3 3U #define GPIOC_PIN4 4U #define GPIOC_PIN5 5U #define GPIOC_PIN6 6U #define GPIOC_PIN7 7U #define GPIOC_SDMMC_1_D0 8U #define GPIOC_SDMMC_1_D1 9U #define GPIOC_SDMMC_1_D2 10U #define GPIOC_SDMMC_1_D3 11U #define GPIOC_SDMMC_1_CK 12U #define GPIOC_JOY_SEL 13U #define GPIOC_BUTTON 13U #define GPIOC_PIN14 14U #define GPIOC_PIN15 15U #define GPIOD_PIN0 0U #define GPIOD_PIN1 1U #define GPIOD_SDMMC_1_CMD 2U #define GPIOD_PIN3 3U #define GPIOD_PIN4 4U #define GPIOD_PIN5 5U #define GPIOD_PIN6 6U #define GPIOD_PIN7 7U #define GPIOD_PIN8 8U #define GPIOD_PIN9 9U #define GPIOD_PIN10 10U #define GPIOD_PIN11 11U #define GPIOD_PIN12 12U #define GPIOD_PIN13 13U #define GPIOD_PIN14 14U #define GPIOD_PIN15 15U #define GPIOE_PIN0 0U #define GPIOE_PIN1 1U #define GPIOE_PIN2 2U #define GPIOE_PIN3 3U #define GPIOE_PIN4 4U #define GPIOE_PIN5 5U #define GPIOE_PIN6 6U #define GPIOE_PIN7 7U #define GPIOE_PIN8 8U #define GPIOE_PIN9 9U #define GPIOE_PIN10 10U #define GPIOE_PIN11 11U #define GPIOE_PIN12 12U #define GPIOE_PIN13 13U #define GPIOE_PIN14 14U #define GPIOE_PIN15 15U #define GPIOF_PIN0 0U #define GPIOF_PIN1 1U #define GPIOF_PIN2 2U #define GPIOF_PIN3 3U #define GPIOF_PIN4 4U #define GPIOF_PIN5 5U #define GPIOF_PIN6 6U #define GPIOF_PIN7 7U #define GPIOF_PIN8 8U #define GPIOF_PIN9 9U #define GPIOF_PIN10 10U #define GPIOF_PIN11 11U #define GPIOF_PIN12 12U #define GPIOF_PIN13 13U #define GPIOF_PIN14 14U #define GPIOF_PIN15 15U #define GPIOG_PIN0 0U #define GPIOG_PIN1 1U #define GPIOG_PIN2 2U #define GPIOG_PIN3 3U #define GPIOG_PIN4 4U #define GPIOG_PIN5 5U #define GPIOG_PIN6 6U #define GPIOG_PIN7 7U #define GPIOG_PIN8 8U #define GPIOG_OCTOSPIM_P2_IO6 9U #define GPIOG_OCTOSPIM_P2_IO7 10U #define GPIOG_PIN11 11U #define GPIOG_OCTOSPIM_P2_NCS 12U #define GPIOG_PIN13 13U #define GPIOG_PIN14 14U #define GPIOG_OCTOSPIM_P2_DQS 15U #define GPIOH_OSC_IN 0U #define GPIOH_OSC_OUT 1U #define GPIOH_PIN2 2U #define GPIOH_BOOT0 3U #define GPIOH_LED 4U #define GPIOH_LED_GREEN 4U #define GPIOH_PIN5 5U #define GPIOH_PIN6 6U #define GPIOH_PIN7 7U #define GPIOH_OCTOSPIM_P2_IO3 8U #define GPIOH_OCTOSPIM_P2_IO4 9U #define GPIOH_OCTOSPIM_P2_IO5 10U #define GPIOH_PIN11 11U #define GPIOH_PIN12 12U #define GPIOH_PIN13 13U #define GPIOH_PIN14 14U #define GPIOH_PIN15 15U #define GPIOI_PIN0 0U #define GPIOI_PIN1 1U #define GPIOI_PIN2 2U #define GPIOI_PIN3 3U #define GPIOI_PIN4 4U #define GPIOI_PIN5 5U #define GPIOI_OCTOSPIM_P2_CLK 6U #define GPIOI_PIN7 7U #define GPIOI_PIN8 8U #define GPIOI_OCTOSPIM_P2_IO2 9U #define GPIOI_OCTOSPIM_P2_IO1 10U #define GPIOI_OCTOSPIM_P2_IO0 11U #define GPIOI_PIN12 12U #define GPIOI_PIN13 13U #define GPIOI_PIN14 14U #define GPIOI_PIN15 15U /* * IO lines assignments. */ #define LINE_STLINK_USART2_TX PAL_LINE(GPIOA, 2U) #define LINE_STLINK_USART2_RX PAL_LINE(GPIOA, 3U) #define LINE_USB_OTGFS_VBUS PAL_LINE(GPIOA, 9U) #define LINE_USB_OTGFS_ID PAL_LINE(GPIOA, 10U) #define LINE_USB_OTGFS_DM PAL_LINE(GPIOA, 11U) #define LINE_USB_OTGFS_DP PAL_LINE(GPIOA, 12U) #define LINE_SWDIO PAL_LINE(GPIOA, 13U) #define LINE_SWCLK PAL_LINE(GPIOA, 14U) #define LINE_SWO PAL_LINE(GPIOB, 3U) #define LINE_SDMMC_1_D0 PAL_LINE(GPIOC, 8U) #define LINE_SDMMC_1_D1 PAL_LINE(GPIOC, 9U) #define LINE_SDMMC_1_D2 PAL_LINE(GPIOC, 10U) #define LINE_SDMMC_1_D3 PAL_LINE(GPIOC, 11U) #define LINE_SDMMC_1_CK PAL_LINE(GPIOC, 12U) #define LINE_JOY_SEL PAL_LINE(GPIOC, 13U) #define LINE_BUTTON PAL_LINE(GPIOC, 13U) #define LINE_SDMMC_1_CMD PAL_LINE(GPIOD, 2U) #define LINE_OCTOSPIM_P2_IO6 PAL_LINE(GPIOG, 9U) #define LINE_OCTOSPIM_P2_IO7 PAL_LINE(GPIOG, 10U) #define LINE_OCTOSPIM_P2_NCS PAL_LINE(GPIOG, 12U) #define LINE_OCTOSPIM_P2_DQS PAL_LINE(GPIOG, 15U) #define LINE_OSC_IN PAL_LINE(GPIOH, 0U) #define LINE_OSC_OUT PAL_LINE(GPIOH, 1U) #define LINE_BOOT0 PAL_LINE(GPIOH, 3U) #define LINE_LED PAL_LINE(GPIOH, 4U) #define LINE_LED_GREEN PAL_LINE(GPIOH, 4U) #define LINE_OCTOSPIM_P2_IO3 PAL_LINE(GPIOH, 8U) #define LINE_OCTOSPIM_P2_IO4 PAL_LINE(GPIOH, 9U) #define LINE_OCTOSPIM_P2_IO5 PAL_LINE(GPIOH, 10U) #define LINE_OCTOSPIM_P2_CLK PAL_LINE(GPIOI, 6U) #define LINE_OCTOSPIM_P2_IO2 PAL_LINE(GPIOI, 9U) #define LINE_OCTOSPIM_P2_IO1 PAL_LINE(GPIOI, 10U) #define LINE_OCTOSPIM_P2_IO0 PAL_LINE(GPIOI, 11U) /*===========================================================================*/ /* Driver pre-compile time settings. */ /*===========================================================================*/ /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver data structures and types. */ /*===========================================================================*/ /*===========================================================================*/ /* Driver macros. */ /*===========================================================================*/ /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) #define PIN_ODR_LOW(n) (0U << (n)) #define PIN_ODR_HIGH(n) (1U << (n)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) #define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U)) #define PIN_OSPEED_LOW(n) (1U << ((n) * 2U)) #define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U)) #define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U)) #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) #define PIN_ASCR_DISABLED(n) (0U << (n)) #define PIN_ASCR_ENABLED(n) (1U << (n)) #define PIN_LOCKR_DISABLED(n) (0U << (n)) #define PIN_LOCKR_ENABLED(n) (1U << (n)) /* * GPIOA setup: * * PA0 - PIN0 (analog). * PA1 - PIN1 (analog). * PA2 - STLINK_USART2_TX (alternate 7). * PA3 - STLINK_USART2_RX (alternate 7). * PA4 - PIN4 (analog). * PA5 - PIN5 (analog). * PA6 - PIN6 (analog). * PA7 - PIN7 (analog). * PA8 - PIN8 (analog). * PA9 - USB_OTGFS_VBUS (input pullup). * PA10 - USB_OTGFS_ID (alternate 10). * PA11 - USB_OTGFS_DM (alternate 10). * PA12 - USB_OTGFS_DP (alternate 10). * PA13 - SWDIO (alternate 0). * PA14 - SWCLK (alternate 0). * PA15 - PIN15 (analog). */ #define VAL_GPIOA_MODER (PIN_MODE_ANALOG(GPIOA_PIN0) | \ PIN_MODE_ANALOG(GPIOA_PIN1) | \ PIN_MODE_ALTERNATE(GPIOA_STLINK_USART2_TX) |\ PIN_MODE_ALTERNATE(GPIOA_STLINK_USART2_RX) |\ PIN_MODE_ANALOG(GPIOA_PIN4) | \ PIN_MODE_ANALOG(GPIOA_PIN5) | \ PIN_MODE_ANALOG(GPIOA_PIN6) | \ PIN_MODE_ANALOG(GPIOA_PIN7) | \ PIN_MODE_ANALOG(GPIOA_PIN8) | \ PIN_MODE_INPUT(GPIOA_USB_OTGFS_VBUS) | \ PIN_MODE_ALTERNATE(GPIOA_USB_OTGFS_ID) |\ PIN_MODE_ALTERNATE(GPIOA_USB_OTGFS_DM) |\ PIN_MODE_ALTERNATE(GPIOA_USB_OTGFS_DP) |\ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ PIN_MODE_ANALOG(GPIOA_PIN15)) #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_USART2_TX) |\ PIN_OTYPE_PUSHPULL(GPIOA_STLINK_USART2_RX) |\ PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOA_USB_OTGFS_VBUS) |\ PIN_OTYPE_PUSHPULL(GPIOA_USB_OTGFS_ID) |\ PIN_OTYPE_PUSHPULL(GPIOA_USB_OTGFS_DM) |\ PIN_OTYPE_PUSHPULL(GPIOA_USB_OTGFS_DP) |\ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \ PIN_OSPEED_HIGH(GPIOA_STLINK_USART2_TX) |\ PIN_OSPEED_HIGH(GPIOA_STLINK_USART2_RX) |\ PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \ PIN_OSPEED_HIGH(GPIOA_USB_OTGFS_VBUS) |\ PIN_OSPEED_HIGH(GPIOA_USB_OTGFS_ID) | \ PIN_OSPEED_HIGH(GPIOA_USB_OTGFS_DM) | \ PIN_OSPEED_HIGH(GPIOA_USB_OTGFS_DP) | \ PIN_OSPEED_HIGH(GPIOA_SWDIO) | \ PIN_OSPEED_HIGH(GPIOA_SWCLK) | \ PIN_OSPEED_VERYLOW(GPIOA_PIN15)) #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \ PIN_PUPDR_FLOATING(GPIOA_PIN1) | \ PIN_PUPDR_FLOATING(GPIOA_STLINK_USART2_TX) |\ PIN_PUPDR_FLOATING(GPIOA_STLINK_USART2_RX) |\ PIN_PUPDR_FLOATING(GPIOA_PIN4) | \ PIN_PUPDR_FLOATING(GPIOA_PIN5) | \ PIN_PUPDR_FLOATING(GPIOA_PIN6) | \ PIN_PUPDR_FLOATING(GPIOA_PIN7) | \ PIN_PUPDR_FLOATING(GPIOA_PIN8) | \ PIN_PUPDR_PULLUP(GPIOA_USB_OTGFS_VBUS) |\ PIN_PUPDR_FLOATING(GPIOA_USB_OTGFS_ID) |\ PIN_PUPDR_FLOATING(GPIOA_USB_OTGFS_DM) |\ PIN_PUPDR_FLOATING(GPIOA_USB_OTGFS_DP) |\ PIN_PUPDR_PULLDOWN(GPIOA_SWDIO) | \ PIN_PUPDR_PULLUP(GPIOA_SWCLK) | \ PIN_PUPDR_FLOATING(GPIOA_PIN15)) #define VAL_GPIOA_ODR (PIN_ODR_LOW(GPIOA_PIN0) | \ PIN_ODR_LOW(GPIOA_PIN1) | \ PIN_ODR_LOW(GPIOA_STLINK_USART2_TX) | \ PIN_ODR_LOW(GPIOA_STLINK_USART2_RX) | \ PIN_ODR_LOW(GPIOA_PIN4) | \ PIN_ODR_LOW(GPIOA_PIN5) | \ PIN_ODR_LOW(GPIOA_PIN6) | \ PIN_ODR_LOW(GPIOA_PIN7) | \ PIN_ODR_LOW(GPIOA_PIN8) | \ PIN_ODR_LOW(GPIOA_USB_OTGFS_VBUS) | \ PIN_ODR_LOW(GPIOA_USB_OTGFS_ID) | \ PIN_ODR_LOW(GPIOA_USB_OTGFS_DM) | \ PIN_ODR_LOW(GPIOA_USB_OTGFS_DP) | \ PIN_ODR_LOW(GPIOA_SWDIO) | \ PIN_ODR_LOW(GPIOA_SWCLK) | \ PIN_ODR_LOW(GPIOA_PIN15)) #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0U) | \ PIN_AFIO_AF(GPIOA_PIN1, 0U) | \ PIN_AFIO_AF(GPIOA_STLINK_USART2_TX, 7U) |\ PIN_AFIO_AF(GPIOA_STLINK_USART2_RX, 7U) |\ PIN_AFIO_AF(GPIOA_PIN4, 0U) | \ PIN_AFIO_AF(GPIOA_PIN5, 0U) | \ PIN_AFIO_AF(GPIOA_PIN6, 0U) | \ PIN_AFIO_AF(GPIOA_PIN7, 0U)) #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \ PIN_AFIO_AF(GPIOA_USB_OTGFS_VBUS, 0U) |\ PIN_AFIO_AF(GPIOA_USB_OTGFS_ID, 10U) | \ PIN_AFIO_AF(GPIOA_USB_OTGFS_DM, 10U) | \ PIN_AFIO_AF(GPIOA_USB_OTGFS_DP, 10U) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \ PIN_AFIO_AF(GPIOA_PIN15, 0U)) #define VAL_GPIOA_ASCR (PIN_ASCR_DISABLED(GPIOA_PIN0) | \ PIN_ASCR_DISABLED(GPIOA_PIN1) | \ PIN_ASCR_DISABLED(GPIOA_STLINK_USART2_TX) |\ PIN_ASCR_DISABLED(GPIOA_STLINK_USART2_RX) |\ PIN_ASCR_DISABLED(GPIOA_PIN4) | \ PIN_ASCR_DISABLED(GPIOA_PIN5) | \ PIN_ASCR_DISABLED(GPIOA_PIN6) | \ PIN_ASCR_DISABLED(GPIOA_PIN7) | \ PIN_ASCR_DISABLED(GPIOA_PIN8) | \ PIN_ASCR_DISABLED(GPIOA_USB_OTGFS_VBUS) |\ PIN_ASCR_DISABLED(GPIOA_USB_OTGFS_ID) |\ PIN_ASCR_DISABLED(GPIOA_USB_OTGFS_DM) |\ PIN_ASCR_DISABLED(GPIOA_USB_OTGFS_DP) |\ PIN_ASCR_DISABLED(GPIOA_SWDIO) | \ PIN_ASCR_DISABLED(GPIOA_SWCLK) | \ PIN_ASCR_DISABLED(GPIOA_PIN15)) #define VAL_GPIOA_LOCKR (PIN_LOCKR_DISABLED(GPIOA_PIN0) | \ PIN_LOCKR_DISABLED(GPIOA_PIN1) | \ PIN_LOCKR_DISABLED(GPIOA_STLINK_USART2_TX) |\ PIN_LOCKR_DISABLED(GPIOA_STLINK_USART2_RX) |\ PIN_LOCKR_DISABLED(GPIOA_PIN4) | \ PIN_LOCKR_DISABLED(GPIOA_PIN5) | \ PIN_LOCKR_DISABLED(GPIOA_PIN6) | \ PIN_LOCKR_DISABLED(GPIOA_PIN7) | \ PIN_LOCKR_DISABLED(GPIOA_PIN8) | \ PIN_LOCKR_DISABLED(GPIOA_USB_OTGFS_VBUS) |\ PIN_LOCKR_DISABLED(GPIOA_USB_OTGFS_ID) |\ PIN_LOCKR_DISABLED(GPIOA_USB_OTGFS_DM) |\ PIN_LOCKR_DISABLED(GPIOA_USB_OTGFS_DP) |\ PIN_LOCKR_DISABLED(GPIOA_SWDIO) | \ PIN_LOCKR_DISABLED(GPIOA_SWCLK) | \ PIN_LOCKR_DISABLED(GPIOA_PIN15)) /* * GPIOB setup: * * PB0 - PIN0 (analog). * PB1 - PIN1 (analog). * PB2 - PIN2 (analog). * PB3 - SWO (alternate 0). * PB4 - PIN4 (analog). * PB5 - PIN5 (analog). * PB6 - PIN6 (analog). * PB7 - PIN7 (analog). * PB8 - PIN8 (analog). * PB9 - PIN9 (analog). * PB10 - PIN10 (analog). * PB11 - PIN11 (analog). * PB12 - PIN12 (analog). * PB13 - PIN13 (analog). * PB14 - PIN14 (analog). * PB15 - PIN15 (analog). */ #define VAL_GPIOB_MODER (PIN_MODE_ANALOG(GPIOB_PIN0) | \ PIN_MODE_ANALOG(GPIOB_PIN1) | \ PIN_MODE_ANALOG(GPIOB_PIN2) | \ PIN_MODE_ALTERNATE(GPIOB_SWO) | \ PIN_MODE_ANALOG(GPIOB_PIN4) | \ PIN_MODE_ANALOG(GPIOB_PIN5) | \ PIN_MODE_ANALOG(GPIOB_PIN6) | \ PIN_MODE_ANALOG(GPIOB_PIN7) | \ PIN_MODE_ANALOG(GPIOB_PIN8) | \ PIN_MODE_ANALOG(GPIOB_PIN9) | \ PIN_MODE_ANALOG(GPIOB_PIN10) | \ PIN_MODE_ANALOG(GPIOB_PIN11) | \ PIN_MODE_ANALOG(GPIOB_PIN12) | \ PIN_MODE_ANALOG(GPIOB_PIN13) | \ PIN_MODE_ANALOG(GPIOB_PIN14) | \ PIN_MODE_ANALOG(GPIOB_PIN15)) #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \ PIN_OSPEED_HIGH(GPIOB_SWO) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOB_PIN15)) #define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING(GPIOB_PIN0) | \ PIN_PUPDR_FLOATING(GPIOB_PIN1) | \ PIN_PUPDR_FLOATING(GPIOB_PIN2) | \ PIN_PUPDR_FLOATING(GPIOB_SWO) | \ PIN_PUPDR_FLOATING(GPIOB_PIN4) | \ PIN_PUPDR_FLOATING(GPIOB_PIN5) | \ PIN_PUPDR_FLOATING(GPIOB_PIN6) | \ PIN_PUPDR_FLOATING(GPIOB_PIN7) | \ PIN_PUPDR_FLOATING(GPIOB_PIN8) | \ PIN_PUPDR_FLOATING(GPIOB_PIN9) | \ PIN_PUPDR_FLOATING(GPIOB_PIN10) | \ PIN_PUPDR_FLOATING(GPIOB_PIN11) | \ PIN_PUPDR_FLOATING(GPIOB_PIN12) | \ PIN_PUPDR_FLOATING(GPIOB_PIN13) | \ PIN_PUPDR_FLOATING(GPIOB_PIN14) | \ PIN_PUPDR_FLOATING(GPIOB_PIN15)) #define VAL_GPIOB_ODR (PIN_ODR_LOW(GPIOB_PIN0) | \ PIN_ODR_LOW(GPIOB_PIN1) | \ PIN_ODR_LOW(GPIOB_PIN2) | \ PIN_ODR_LOW(GPIOB_SWO) | \ PIN_ODR_LOW(GPIOB_PIN4) | \ PIN_ODR_LOW(GPIOB_PIN5) | \ PIN_ODR_LOW(GPIOB_PIN6) | \ PIN_ODR_LOW(GPIOB_PIN7) | \ PIN_ODR_LOW(GPIOB_PIN8) | \ PIN_ODR_LOW(GPIOB_PIN9) | \ PIN_ODR_LOW(GPIOB_PIN10) | \ PIN_ODR_LOW(GPIOB_PIN11) | \ PIN_ODR_LOW(GPIOB_PIN12) | \ PIN_ODR_LOW(GPIOB_PIN13) | \ PIN_ODR_LOW(GPIOB_PIN14) | \ PIN_ODR_LOW(GPIOB_PIN15)) #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \ PIN_AFIO_AF(GPIOB_PIN1, 0U) | \ PIN_AFIO_AF(GPIOB_PIN2, 0U) | \ PIN_AFIO_AF(GPIOB_SWO, 0U) | \ PIN_AFIO_AF(GPIOB_PIN4, 0U) | \ PIN_AFIO_AF(GPIOB_PIN5, 0U) | \ PIN_AFIO_AF(GPIOB_PIN6, 0U) | \ PIN_AFIO_AF(GPIOB_PIN7, 0U)) #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \ PIN_AFIO_AF(GPIOB_PIN9, 0U) | \ PIN_AFIO_AF(GPIOB_PIN10, 0U) | \ PIN_AFIO_AF(GPIOB_PIN11, 0U) | \ PIN_AFIO_AF(GPIOB_PIN12, 0U) | \ PIN_AFIO_AF(GPIOB_PIN13, 0U) | \ PIN_AFIO_AF(GPIOB_PIN14, 0U) | \ PIN_AFIO_AF(GPIOB_PIN15, 0U)) #define VAL_GPIOB_ASCR (PIN_ASCR_DISABLED(GPIOB_PIN0) | \ PIN_ASCR_DISABLED(GPIOB_PIN1) | \ PIN_ASCR_DISABLED(GPIOB_PIN2) | \ PIN_ASCR_DISABLED(GPIOB_SWO) | \ PIN_ASCR_DISABLED(GPIOB_PIN4) | \ PIN_ASCR_DISABLED(GPIOB_PIN5) | \ PIN_ASCR_DISABLED(GPIOB_PIN6) | \ PIN_ASCR_DISABLED(GPIOB_PIN7) | \ PIN_ASCR_DISABLED(GPIOB_PIN8) | \ PIN_ASCR_DISABLED(GPIOB_PIN9) | \ PIN_ASCR_DISABLED(GPIOB_PIN10) | \ PIN_ASCR_DISABLED(GPIOB_PIN11) | \ PIN_ASCR_DISABLED(GPIOB_PIN12) | \ PIN_ASCR_DISABLED(GPIOB_PIN13) | \ PIN_ASCR_DISABLED(GPIOB_PIN14) | \ PIN_ASCR_DISABLED(GPIOB_PIN15)) #define VAL_GPIOB_LOCKR (PIN_LOCKR_DISABLED(GPIOB_PIN0) | \ PIN_LOCKR_DISABLED(GPIOB_PIN1) | \ PIN_LOCKR_DISABLED(GPIOB_PIN2) | \ PIN_LOCKR_DISABLED(GPIOB_SWO) | \ PIN_LOCKR_DISABLED(GPIOB_PIN4) | \ PIN_LOCKR_DISABLED(GPIOB_PIN5) | \ PIN_LOCKR_DISABLED(GPIOB_PIN6) | \ PIN_LOCKR_DISABLED(GPIOB_PIN7) | \ PIN_LOCKR_DISABLED(GPIOB_PIN8) | \ PIN_LOCKR_DISABLED(GPIOB_PIN9) | \ PIN_LOCKR_DISABLED(GPIOB_PIN10) | \ PIN_LOCKR_DISABLED(GPIOB_PIN11) | \ PIN_LOCKR_DISABLED(GPIOB_PIN12) | \ PIN_LOCKR_DISABLED(GPIOB_PIN13) | \ PIN_LOCKR_DISABLED(GPIOB_PIN14) | \ PIN_LOCKR_DISABLED(GPIOB_PIN15)) /* * GPIOC setup: * * PC0 - PIN0 (analog). * PC1 - PIN1 (analog). * PC2 - PIN2 (analog). * PC3 - PIN3 (analog). * PC4 - PIN4 (analog). * PC5 - PIN5 (analog). * PC6 - PIN6 (analog). * PC7 - PIN7 (analog). * PC8 - SDMMC_1_D0 (alternate 12). * PC9 - SDMMC_1_D1 (alternate 12). * PC10 - SDMMC_1_D2 (alternate 12). * PC11 - SDMMC_1_D3 (alternate 12). * PC12 - SDMMC_1_CK (alternate 12). * PC13 - JOY_SEL BUTTON (input pulldown). * PC14 - PIN14 (analog). * PC15 - PIN15 (analog). */ #define VAL_GPIOC_MODER (PIN_MODE_ANALOG(GPIOC_PIN0) | \ PIN_MODE_ANALOG(GPIOC_PIN1) | \ PIN_MODE_ANALOG(GPIOC_PIN2) | \ PIN_MODE_ANALOG(GPIOC_PIN3) | \ PIN_MODE_ANALOG(GPIOC_PIN4) | \ PIN_MODE_ANALOG(GPIOC_PIN5) | \ PIN_MODE_ANALOG(GPIOC_PIN6) | \ PIN_MODE_ANALOG(GPIOC_PIN7) | \ PIN_MODE_ALTERNATE(GPIOC_SDMMC_1_D0) | \ PIN_MODE_ALTERNATE(GPIOC_SDMMC_1_D1) | \ PIN_MODE_ALTERNATE(GPIOC_SDMMC_1_D2) | \ PIN_MODE_ALTERNATE(GPIOC_SDMMC_1_D3) | \ PIN_MODE_ALTERNATE(GPIOC_SDMMC_1_CK) | \ PIN_MODE_INPUT(GPIOC_JOY_SEL) | \ PIN_MODE_ANALOG(GPIOC_PIN14) | \ PIN_MODE_ANALOG(GPIOC_PIN15)) #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDMMC_1_D0) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDMMC_1_D1) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDMMC_1_D2) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDMMC_1_D3) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDMMC_1_CK) | \ PIN_OTYPE_PUSHPULL(GPIOC_JOY_SEL) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \ PIN_OSPEED_HIGH(GPIOC_SDMMC_1_D0) | \ PIN_OSPEED_HIGH(GPIOC_SDMMC_1_D1) | \ PIN_OSPEED_HIGH(GPIOC_SDMMC_1_D2) | \ PIN_OSPEED_HIGH(GPIOC_SDMMC_1_D3) | \ PIN_OSPEED_HIGH(GPIOC_SDMMC_1_CK) | \ PIN_OSPEED_VERYLOW(GPIOC_JOY_SEL) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOC_PIN15)) #define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_PIN0) | \ PIN_PUPDR_FLOATING(GPIOC_PIN1) | \ PIN_PUPDR_FLOATING(GPIOC_PIN2) | \ PIN_PUPDR_FLOATING(GPIOC_PIN3) | \ PIN_PUPDR_FLOATING(GPIOC_PIN4) | \ PIN_PUPDR_FLOATING(GPIOC_PIN5) | \ PIN_PUPDR_FLOATING(GPIOC_PIN6) | \ PIN_PUPDR_FLOATING(GPIOC_PIN7) | \ PIN_PUPDR_FLOATING(GPIOC_SDMMC_1_D0) | \ PIN_PUPDR_FLOATING(GPIOC_SDMMC_1_D1) | \ PIN_PUPDR_FLOATING(GPIOC_SDMMC_1_D2) | \ PIN_PUPDR_FLOATING(GPIOC_SDMMC_1_D3) | \ PIN_PUPDR_FLOATING(GPIOC_SDMMC_1_CK) | \ PIN_PUPDR_PULLDOWN(GPIOC_JOY_SEL) | \ PIN_PUPDR_FLOATING(GPIOC_PIN14) | \ PIN_PUPDR_FLOATING(GPIOC_PIN15)) #define VAL_GPIOC_ODR (PIN_ODR_LOW(GPIOC_PIN0) | \ PIN_ODR_LOW(GPIOC_PIN1) | \ PIN_ODR_LOW(GPIOC_PIN2) | \ PIN_ODR_LOW(GPIOC_PIN3) | \ PIN_ODR_LOW(GPIOC_PIN4) | \ PIN_ODR_LOW(GPIOC_PIN5) | \ PIN_ODR_LOW(GPIOC_PIN6) | \ PIN_ODR_LOW(GPIOC_PIN7) | \ PIN_ODR_LOW(GPIOC_SDMMC_1_D0) | \ PIN_ODR_LOW(GPIOC_SDMMC_1_D1) | \ PIN_ODR_LOW(GPIOC_SDMMC_1_D2) | \ PIN_ODR_LOW(GPIOC_SDMMC_1_D3) | \ PIN_ODR_LOW(GPIOC_SDMMC_1_CK) | \ PIN_ODR_LOW(GPIOC_JOY_SEL) | \ PIN_ODR_LOW(GPIOC_PIN14) | \ PIN_ODR_LOW(GPIOC_PIN15)) #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \ PIN_AFIO_AF(GPIOC_PIN1, 0U) | \ PIN_AFIO_AF(GPIOC_PIN2, 0U) | \ PIN_AFIO_AF(GPIOC_PIN3, 0U) | \ PIN_AFIO_AF(GPIOC_PIN4, 0U) | \ PIN_AFIO_AF(GPIOC_PIN5, 0U) | \ PIN_AFIO_AF(GPIOC_PIN6, 0U) | \ PIN_AFIO_AF(GPIOC_PIN7, 0U)) #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SDMMC_1_D0, 12U) | \ PIN_AFIO_AF(GPIOC_SDMMC_1_D1, 12U) | \ PIN_AFIO_AF(GPIOC_SDMMC_1_D2, 12U) | \ PIN_AFIO_AF(GPIOC_SDMMC_1_D3, 12U) | \ PIN_AFIO_AF(GPIOC_SDMMC_1_CK, 12U) | \ PIN_AFIO_AF(GPIOC_JOY_SEL, 0U) | \ PIN_AFIO_AF(GPIOC_PIN14, 0U) | \ PIN_AFIO_AF(GPIOC_PIN15, 0U)) #define VAL_GPIOC_ASCR (PIN_ASCR_DISABLED(GPIOC_PIN0) | \ PIN_ASCR_DISABLED(GPIOC_PIN1) | \ PIN_ASCR_DISABLED(GPIOC_PIN2) | \ PIN_ASCR_DISABLED(GPIOC_PIN3) | \ PIN_ASCR_DISABLED(GPIOC_PIN4) | \ PIN_ASCR_DISABLED(GPIOC_PIN5) | \ PIN_ASCR_DISABLED(GPIOC_PIN6) | \ PIN_ASCR_DISABLED(GPIOC_PIN7) | \ PIN_ASCR_DISABLED(GPIOC_SDMMC_1_D0) | \ PIN_ASCR_DISABLED(GPIOC_SDMMC_1_D1) | \ PIN_ASCR_DISABLED(GPIOC_SDMMC_1_D2) | \ PIN_ASCR_DISABLED(GPIOC_SDMMC_1_D3) | \ PIN_ASCR_DISABLED(GPIOC_SDMMC_1_CK) | \ PIN_ASCR_DISABLED(GPIOC_JOY_SEL) | \ PIN_ASCR_DISABLED(GPIOC_PIN14) | \ PIN_ASCR_DISABLED(GPIOC_PIN15)) #define VAL_GPIOC_LOCKR (PIN_LOCKR_DISABLED(GPIOC_PIN0) | \ PIN_LOCKR_DISABLED(GPIOC_PIN1) | \ PIN_LOCKR_DISABLED(GPIOC_PIN2) | \ PIN_LOCKR_DISABLED(GPIOC_PIN3) | \ PIN_LOCKR_DISABLED(GPIOC_PIN4) | \ PIN_LOCKR_DISABLED(GPIOC_PIN5) | \ PIN_LOCKR_DISABLED(GPIOC_PIN6) | \ PIN_LOCKR_DISABLED(GPIOC_PIN7) | \ PIN_LOCKR_DISABLED(GPIOC_SDMMC_1_D0) | \ PIN_LOCKR_DISABLED(GPIOC_SDMMC_1_D1) | \ PIN_LOCKR_DISABLED(GPIOC_SDMMC_1_D2) | \ PIN_LOCKR_DISABLED(GPIOC_SDMMC_1_D3) | \ PIN_LOCKR_DISABLED(GPIOC_SDMMC_1_CK) | \ PIN_LOCKR_DISABLED(GPIOC_JOY_SEL) | \ PIN_LOCKR_DISABLED(GPIOC_PIN14) | \ PIN_LOCKR_DISABLED(GPIOC_PIN15)) /* * GPIOD setup: * * PD0 - PIN0 (analog). * PD1 - PIN1 (analog). * PD2 - SDMMC_1_CMD (alternate 12). * PD3 - PIN3 (analog). * PD4 - PIN4 (analog). * PD5 - PIN5 (analog). * PD6 - PIN6 (analog). * PD7 - PIN7 (analog). * PD8 - PIN8 (analog). * PD9 - PIN9 (analog). * PD10 - PIN10 (analog). * PD11 - PIN11 (analog). * PD12 - PIN12 (analog). * PD13 - PIN13 (analog). * PD14 - PIN14 (analog). * PD15 - PIN15 (analog). */ #define VAL_GPIOD_MODER (PIN_MODE_ANALOG(GPIOD_PIN0) | \ PIN_MODE_ANALOG(GPIOD_PIN1) | \ PIN_MODE_ALTERNATE(GPIOD_SDMMC_1_CMD) |\ PIN_MODE_ANALOG(GPIOD_PIN3) | \ PIN_MODE_ANALOG(GPIOD_PIN4) | \ PIN_MODE_ANALOG(GPIOD_PIN5) | \ PIN_MODE_ANALOG(GPIOD_PIN6) | \ PIN_MODE_ANALOG(GPIOD_PIN7) | \ PIN_MODE_ANALOG(GPIOD_PIN8) | \ PIN_MODE_ANALOG(GPIOD_PIN9) | \ PIN_MODE_ANALOG(GPIOD_PIN10) | \ PIN_MODE_ANALOG(GPIOD_PIN11) | \ PIN_MODE_ANALOG(GPIOD_PIN12) | \ PIN_MODE_ANALOG(GPIOD_PIN13) | \ PIN_MODE_ANALOG(GPIOD_PIN14) | \ PIN_MODE_ANALOG(GPIOD_PIN15)) #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOD_SDMMC_1_CMD) |\ PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN15)) #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \ PIN_OSPEED_HIGH(GPIOD_SDMMC_1_CMD) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOD_PIN15)) #define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_PIN0) | \ PIN_PUPDR_FLOATING(GPIOD_PIN1) | \ PIN_PUPDR_FLOATING(GPIOD_SDMMC_1_CMD) |\ PIN_PUPDR_FLOATING(GPIOD_PIN3) | \ PIN_PUPDR_FLOATING(GPIOD_PIN4) | \ PIN_PUPDR_FLOATING(GPIOD_PIN5) | \ PIN_PUPDR_FLOATING(GPIOD_PIN6) | \ PIN_PUPDR_FLOATING(GPIOD_PIN7) | \ PIN_PUPDR_FLOATING(GPIOD_PIN8) | \ PIN_PUPDR_FLOATING(GPIOD_PIN9) | \ PIN_PUPDR_FLOATING(GPIOD_PIN10) | \ PIN_PUPDR_FLOATING(GPIOD_PIN11) | \ PIN_PUPDR_FLOATING(GPIOD_PIN12) | \ PIN_PUPDR_FLOATING(GPIOD_PIN13) | \ PIN_PUPDR_FLOATING(GPIOD_PIN14) | \ PIN_PUPDR_FLOATING(GPIOD_PIN15)) #define VAL_GPIOD_ODR (PIN_ODR_LOW(GPIOD_PIN0) | \ PIN_ODR_LOW(GPIOD_PIN1) | \ PIN_ODR_LOW(GPIOD_SDMMC_1_CMD) | \ PIN_ODR_LOW(GPIOD_PIN3) | \ PIN_ODR_LOW(GPIOD_PIN4) | \ PIN_ODR_LOW(GPIOD_PIN5) | \ PIN_ODR_LOW(GPIOD_PIN6) | \ PIN_ODR_LOW(GPIOD_PIN7) | \ PIN_ODR_LOW(GPIOD_PIN8) | \ PIN_ODR_LOW(GPIOD_PIN9) | \ PIN_ODR_LOW(GPIOD_PIN10) | \ PIN_ODR_LOW(GPIOD_PIN11) | \ PIN_ODR_LOW(GPIOD_PIN12) | \ PIN_ODR_LOW(GPIOD_PIN13) | \ PIN_ODR_LOW(GPIOD_PIN14) | \ PIN_ODR_LOW(GPIOD_PIN15)) #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \ PIN_AFIO_AF(GPIOD_PIN1, 0U) | \ PIN_AFIO_AF(GPIOD_SDMMC_1_CMD, 12U) | \ PIN_AFIO_AF(GPIOD_PIN3, 0U) | \ PIN_AFIO_AF(GPIOD_PIN4, 0U) | \ PIN_AFIO_AF(GPIOD_PIN5, 0U) | \ PIN_AFIO_AF(GPIOD_PIN6, 0U) | \ PIN_AFIO_AF(GPIOD_PIN7, 0U)) #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \ PIN_AFIO_AF(GPIOD_PIN9, 0U) | \ PIN_AFIO_AF(GPIOD_PIN10, 0U) | \ PIN_AFIO_AF(GPIOD_PIN11, 0U) | \ PIN_AFIO_AF(GPIOD_PIN12, 0U) | \ PIN_AFIO_AF(GPIOD_PIN13, 0U) | \ PIN_AFIO_AF(GPIOD_PIN14, 0U) | \ PIN_AFIO_AF(GPIOD_PIN15, 0U)) #define VAL_GPIOD_ASCR (PIN_ASCR_DISABLED(GPIOD_PIN0) | \ PIN_ASCR_DISABLED(GPIOD_PIN1) | \ PIN_ASCR_DISABLED(GPIOD_SDMMC_1_CMD) | \ PIN_ASCR_DISABLED(GPIOD_PIN3) | \ PIN_ASCR_DISABLED(GPIOD_PIN4) | \ PIN_ASCR_DISABLED(GPIOD_PIN5) | \ PIN_ASCR_DISABLED(GPIOD_PIN6) | \ PIN_ASCR_DISABLED(GPIOD_PIN7) | \ PIN_ASCR_DISABLED(GPIOD_PIN8) | \ PIN_ASCR_DISABLED(GPIOD_PIN9) | \ PIN_ASCR_DISABLED(GPIOD_PIN10) | \ PIN_ASCR_DISABLED(GPIOD_PIN11) | \ PIN_ASCR_DISABLED(GPIOD_PIN12) | \ PIN_ASCR_DISABLED(GPIOD_PIN13) | \ PIN_ASCR_DISABLED(GPIOD_PIN14) | \ PIN_ASCR_DISABLED(GPIOD_PIN15)) #define VAL_GPIOD_LOCKR (PIN_LOCKR_DISABLED(GPIOD_PIN0) | \ PIN_LOCKR_DISABLED(GPIOD_PIN1) | \ PIN_LOCKR_DISABLED(GPIOD_SDMMC_1_CMD) |\ PIN_LOCKR_DISABLED(GPIOD_PIN3) | \ PIN_LOCKR_DISABLED(GPIOD_PIN4) | \ PIN_LOCKR_DISABLED(GPIOD_PIN5) | \ PIN_LOCKR_DISABLED(GPIOD_PIN6) | \ PIN_LOCKR_DISABLED(GPIOD_PIN7) | \ PIN_LOCKR_DISABLED(GPIOD_PIN8) | \ PIN_LOCKR_DISABLED(GPIOD_PIN9) | \ PIN_LOCKR_DISABLED(GPIOD_PIN10) | \ PIN_LOCKR_DISABLED(GPIOD_PIN11) | \ PIN_LOCKR_DISABLED(GPIOD_PIN12) | \ PIN_LOCKR_DISABLED(GPIOD_PIN13) | \ PIN_LOCKR_DISABLED(GPIOD_PIN14) | \ PIN_LOCKR_DISABLED(GPIOD_PIN15)) /* * GPIOE setup: * * PE0 - PIN0 (analog). * PE1 - PIN1 (analog). * PE2 - PIN2 (analog). * PE3 - PIN3 (analog). * PE4 - PIN4 (analog). * PE5 - PIN5 (analog). * PE6 - PIN6 (analog). * PE7 - PIN7 (analog). * PE8 - PIN8 (analog). * PE9 - PIN9 (analog). * PE10 - PIN10 (analog). * PE11 - PIN11 (analog). * PE12 - PIN12 (analog). * PE13 - PIN13 (analog). * PE14 - PIN14 (analog). * PE15 - PIN15 (analog). */ #define VAL_GPIOE_MODER (PIN_MODE_ANALOG(GPIOE_PIN0) | \ PIN_MODE_ANALOG(GPIOE_PIN1) | \ PIN_MODE_ANALOG(GPIOE_PIN2) | \ PIN_MODE_ANALOG(GPIOE_PIN3) | \ PIN_MODE_ANALOG(GPIOE_PIN4) | \ PIN_MODE_ANALOG(GPIOE_PIN5) | \ PIN_MODE_ANALOG(GPIOE_PIN6) | \ PIN_MODE_ANALOG(GPIOE_PIN7) | \ PIN_MODE_ANALOG(GPIOE_PIN8) | \ PIN_MODE_ANALOG(GPIOE_PIN9) | \ PIN_MODE_ANALOG(GPIOE_PIN10) | \ PIN_MODE_ANALOG(GPIOE_PIN11) | \ PIN_MODE_ANALOG(GPIOE_PIN12) | \ PIN_MODE_ANALOG(GPIOE_PIN13) | \ PIN_MODE_ANALOG(GPIOE_PIN14) | \ PIN_MODE_ANALOG(GPIOE_PIN15)) #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN8) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN9) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN10) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN11) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOE_PIN15)) #define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \ PIN_PUPDR_FLOATING(GPIOE_PIN1) | \ PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ PIN_PUPDR_FLOATING(GPIOE_PIN3) | \ PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ PIN_PUPDR_FLOATING(GPIOE_PIN15)) #define VAL_GPIOE_ODR (PIN_ODR_LOW(GPIOE_PIN0) | \ PIN_ODR_LOW(GPIOE_PIN1) | \ PIN_ODR_LOW(GPIOE_PIN2) | \ PIN_ODR_LOW(GPIOE_PIN3) | \ PIN_ODR_LOW(GPIOE_PIN4) | \ PIN_ODR_LOW(GPIOE_PIN5) | \ PIN_ODR_LOW(GPIOE_PIN6) | \ PIN_ODR_LOW(GPIOE_PIN7) | \ PIN_ODR_LOW(GPIOE_PIN8) | \ PIN_ODR_LOW(GPIOE_PIN9) | \ PIN_ODR_LOW(GPIOE_PIN10) | \ PIN_ODR_LOW(GPIOE_PIN11) | \ PIN_ODR_LOW(GPIOE_PIN12) | \ PIN_ODR_LOW(GPIOE_PIN13) | \ PIN_ODR_LOW(GPIOE_PIN14) | \ PIN_ODR_LOW(GPIOE_PIN15)) #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \ PIN_AFIO_AF(GPIOE_PIN1, 0U) | \ PIN_AFIO_AF(GPIOE_PIN2, 0U) | \ PIN_AFIO_AF(GPIOE_PIN3, 0U) | \ PIN_AFIO_AF(GPIOE_PIN4, 0U) | \ PIN_AFIO_AF(GPIOE_PIN5, 0U) | \ PIN_AFIO_AF(GPIOE_PIN6, 0U) | \ PIN_AFIO_AF(GPIOE_PIN7, 0U)) #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \ PIN_AFIO_AF(GPIOE_PIN9, 0U) | \ PIN_AFIO_AF(GPIOE_PIN10, 0U) | \ PIN_AFIO_AF(GPIOE_PIN11, 0U) | \ PIN_AFIO_AF(GPIOE_PIN12, 0U) | \ PIN_AFIO_AF(GPIOE_PIN13, 0U) | \ PIN_AFIO_AF(GPIOE_PIN14, 0U) | \ PIN_AFIO_AF(GPIOE_PIN15, 0U)) #define VAL_GPIOE_ASCR (PIN_ASCR_DISABLED(GPIOE_PIN0) | \ PIN_ASCR_DISABLED(GPIOE_PIN1) | \ PIN_ASCR_DISABLED(GPIOE_PIN2) | \ PIN_ASCR_DISABLED(GPIOE_PIN3) | \ PIN_ASCR_DISABLED(GPIOE_PIN4) | \ PIN_ASCR_DISABLED(GPIOE_PIN5) | \ PIN_ASCR_DISABLED(GPIOE_PIN6) | \ PIN_ASCR_DISABLED(GPIOE_PIN7) | \ PIN_ASCR_DISABLED(GPIOE_PIN8) | \ PIN_ASCR_DISABLED(GPIOE_PIN9) | \ PIN_ASCR_DISABLED(GPIOE_PIN10) | \ PIN_ASCR_DISABLED(GPIOE_PIN11) | \ PIN_ASCR_DISABLED(GPIOE_PIN12) | \ PIN_ASCR_DISABLED(GPIOE_PIN13) | \ PIN_ASCR_DISABLED(GPIOE_PIN14) | \ PIN_ASCR_DISABLED(GPIOE_PIN15)) #define VAL_GPIOE_LOCKR (PIN_LOCKR_DISABLED(GPIOE_PIN0) | \ PIN_LOCKR_DISABLED(GPIOE_PIN1) | \ PIN_LOCKR_DISABLED(GPIOE_PIN2) | \ PIN_LOCKR_DISABLED(GPIOE_PIN3) | \ PIN_LOCKR_DISABLED(GPIOE_PIN4) | \ PIN_LOCKR_DISABLED(GPIOE_PIN5) | \ PIN_LOCKR_DISABLED(GPIOE_PIN6) | \ PIN_LOCKR_DISABLED(GPIOE_PIN7) | \ PIN_LOCKR_DISABLED(GPIOE_PIN8) | \ PIN_LOCKR_DISABLED(GPIOE_PIN9) | \ PIN_LOCKR_DISABLED(GPIOE_PIN10) | \ PIN_LOCKR_DISABLED(GPIOE_PIN11) | \ PIN_LOCKR_DISABLED(GPIOE_PIN12) | \ PIN_LOCKR_DISABLED(GPIOE_PIN13) | \ PIN_LOCKR_DISABLED(GPIOE_PIN14) | \ PIN_LOCKR_DISABLED(GPIOE_PIN15)) /* * GPIOF setup: * * PF0 - PIN0 (analog). * PF1 - PIN1 (analog). * PF2 - PIN2 (analog). * PF3 - PIN3 (analog). * PF4 - PIN4 (analog). * PF5 - PIN5 (analog). * PF6 - PIN6 (analog). * PF7 - PIN7 (analog). * PF8 - PIN8 (analog). * PF9 - PIN9 (analog). * PF10 - PIN10 (analog). * PF11 - PIN11 (analog). * PF12 - PIN12 (analog). * PF13 - PIN13 (analog). * PF14 - PIN14 (analog). * PF15 - PIN15 (analog). */ #define VAL_GPIOF_MODER (PIN_MODE_ANALOG(GPIOF_PIN0) | \ PIN_MODE_ANALOG(GPIOF_PIN1) | \ PIN_MODE_ANALOG(GPIOF_PIN2) | \ PIN_MODE_ANALOG(GPIOF_PIN3) | \ PIN_MODE_ANALOG(GPIOF_PIN4) | \ PIN_MODE_ANALOG(GPIOF_PIN5) | \ PIN_MODE_ANALOG(GPIOF_PIN6) | \ PIN_MODE_ANALOG(GPIOF_PIN7) | \ PIN_MODE_ANALOG(GPIOF_PIN8) | \ PIN_MODE_ANALOG(GPIOF_PIN9) | \ PIN_MODE_ANALOG(GPIOF_PIN10) | \ PIN_MODE_ANALOG(GPIOF_PIN11) | \ PIN_MODE_ANALOG(GPIOF_PIN12) | \ PIN_MODE_ANALOG(GPIOF_PIN13) | \ PIN_MODE_ANALOG(GPIOF_PIN14) | \ PIN_MODE_ANALOG(GPIOF_PIN15)) #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOF_PIN15)) #define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ PIN_PUPDR_FLOATING(GPIOF_PIN15)) #define VAL_GPIOF_ODR (PIN_ODR_LOW(GPIOF_PIN0) | \ PIN_ODR_LOW(GPIOF_PIN1) | \ PIN_ODR_LOW(GPIOF_PIN2) | \ PIN_ODR_LOW(GPIOF_PIN3) | \ PIN_ODR_LOW(GPIOF_PIN4) | \ PIN_ODR_LOW(GPIOF_PIN5) | \ PIN_ODR_LOW(GPIOF_PIN6) | \ PIN_ODR_LOW(GPIOF_PIN7) | \ PIN_ODR_LOW(GPIOF_PIN8) | \ PIN_ODR_LOW(GPIOF_PIN9) | \ PIN_ODR_LOW(GPIOF_PIN10) | \ PIN_ODR_LOW(GPIOF_PIN11) | \ PIN_ODR_LOW(GPIOF_PIN12) | \ PIN_ODR_LOW(GPIOF_PIN13) | \ PIN_ODR_LOW(GPIOF_PIN14) | \ PIN_ODR_LOW(GPIOF_PIN15)) #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \ PIN_AFIO_AF(GPIOF_PIN1, 0U) | \ PIN_AFIO_AF(GPIOF_PIN2, 0U) | \ PIN_AFIO_AF(GPIOF_PIN3, 0U) | \ PIN_AFIO_AF(GPIOF_PIN4, 0U) | \ PIN_AFIO_AF(GPIOF_PIN5, 0U) | \ PIN_AFIO_AF(GPIOF_PIN6, 0U) | \ PIN_AFIO_AF(GPIOF_PIN7, 0U)) #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \ PIN_AFIO_AF(GPIOF_PIN9, 0U) | \ PIN_AFIO_AF(GPIOF_PIN10, 0U) | \ PIN_AFIO_AF(GPIOF_PIN11, 0U) | \ PIN_AFIO_AF(GPIOF_PIN12, 0U) | \ PIN_AFIO_AF(GPIOF_PIN13, 0U) | \ PIN_AFIO_AF(GPIOF_PIN14, 0U) | \ PIN_AFIO_AF(GPIOF_PIN15, 0U)) #define VAL_GPIOF_ASCR (PIN_ASCR_DISABLED(GPIOF_PIN0) | \ PIN_ASCR_DISABLED(GPIOF_PIN1) | \ PIN_ASCR_DISABLED(GPIOF_PIN2) | \ PIN_ASCR_DISABLED(GPIOF_PIN3) | \ PIN_ASCR_DISABLED(GPIOF_PIN4) | \ PIN_ASCR_DISABLED(GPIOF_PIN5) | \ PIN_ASCR_DISABLED(GPIOF_PIN6) | \ PIN_ASCR_DISABLED(GPIOF_PIN7) | \ PIN_ASCR_DISABLED(GPIOF_PIN8) | \ PIN_ASCR_DISABLED(GPIOF_PIN9) | \ PIN_ASCR_DISABLED(GPIOF_PIN10) | \ PIN_ASCR_DISABLED(GPIOF_PIN11) | \ PIN_ASCR_DISABLED(GPIOF_PIN12) | \ PIN_ASCR_DISABLED(GPIOF_PIN13) | \ PIN_ASCR_DISABLED(GPIOF_PIN14) | \ PIN_ASCR_DISABLED(GPIOF_PIN15)) #define VAL_GPIOF_LOCKR (PIN_LOCKR_DISABLED(GPIOF_PIN0) | \ PIN_LOCKR_DISABLED(GPIOF_PIN1) | \ PIN_LOCKR_DISABLED(GPIOF_PIN2) | \ PIN_LOCKR_DISABLED(GPIOF_PIN3) | \ PIN_LOCKR_DISABLED(GPIOF_PIN4) | \ PIN_LOCKR_DISABLED(GPIOF_PIN5) | \ PIN_LOCKR_DISABLED(GPIOF_PIN6) | \ PIN_LOCKR_DISABLED(GPIOF_PIN7) | \ PIN_LOCKR_DISABLED(GPIOF_PIN8) | \ PIN_LOCKR_DISABLED(GPIOF_PIN9) | \ PIN_LOCKR_DISABLED(GPIOF_PIN10) | \ PIN_LOCKR_DISABLED(GPIOF_PIN11) | \ PIN_LOCKR_DISABLED(GPIOF_PIN12) | \ PIN_LOCKR_DISABLED(GPIOF_PIN13) | \ PIN_LOCKR_DISABLED(GPIOF_PIN14) | \ PIN_LOCKR_DISABLED(GPIOF_PIN15)) /* * GPIOG setup: * * PG0 - PIN0 (analog). * PG1 - PIN1 (analog). * PG2 - PIN2 (analog). * PG3 - PIN3 (analog). * PG4 - PIN4 (analog). * PG5 - PIN5 (analog). * PG6 - PIN6 (analog). * PG7 - PIN7 (analog). * PG8 - PIN8 (analog). * PG9 - OCTOSPIM_P2_IO6 (alternate 5). * PG10 - OCTOSPIM_P2_IO7 (alternate 5). * PG11 - PIN11 (analog). * PG12 - OCTOSPIM_P2_NCS (alternate 5). * PG13 - PIN13 (analog). * PG14 - PIN14 (analog). * PG15 - OCTOSPIM_P2_DQS (alternate 5). */ #define VAL_GPIOG_MODER (PIN_MODE_ANALOG(GPIOG_PIN0) | \ PIN_MODE_ANALOG(GPIOG_PIN1) | \ PIN_MODE_ANALOG(GPIOG_PIN2) | \ PIN_MODE_ANALOG(GPIOG_PIN3) | \ PIN_MODE_ANALOG(GPIOG_PIN4) | \ PIN_MODE_ANALOG(GPIOG_PIN5) | \ PIN_MODE_ANALOG(GPIOG_PIN6) | \ PIN_MODE_ANALOG(GPIOG_PIN7) | \ PIN_MODE_ANALOG(GPIOG_PIN8) | \ PIN_MODE_ALTERNATE(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_MODE_ALTERNATE(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_MODE_ANALOG(GPIOG_PIN11) | \ PIN_MODE_ALTERNATE(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_MODE_ANALOG(GPIOG_PIN13) | \ PIN_MODE_ANALOG(GPIOG_PIN14) | \ PIN_MODE_ALTERNATE(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_OTYPE_PUSHPULL(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \ PIN_OSPEED_HIGH(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_OSPEED_HIGH(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \ PIN_OSPEED_HIGH(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \ PIN_OSPEED_HIGH(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ PIN_PUPDR_FLOATING(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_PUPDR_FLOATING(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ PIN_PUPDR_FLOATING(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ PIN_PUPDR_FLOATING(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_ODR (PIN_ODR_LOW(GPIOG_PIN0) | \ PIN_ODR_LOW(GPIOG_PIN1) | \ PIN_ODR_LOW(GPIOG_PIN2) | \ PIN_ODR_LOW(GPIOG_PIN3) | \ PIN_ODR_LOW(GPIOG_PIN4) | \ PIN_ODR_LOW(GPIOG_PIN5) | \ PIN_ODR_LOW(GPIOG_PIN6) | \ PIN_ODR_LOW(GPIOG_PIN7) | \ PIN_ODR_LOW(GPIOG_PIN8) | \ PIN_ODR_LOW(GPIOG_OCTOSPIM_P2_IO6) | \ PIN_ODR_LOW(GPIOG_OCTOSPIM_P2_IO7) | \ PIN_ODR_LOW(GPIOG_PIN11) | \ PIN_ODR_LOW(GPIOG_OCTOSPIM_P2_NCS) | \ PIN_ODR_LOW(GPIOG_PIN13) | \ PIN_ODR_LOW(GPIOG_PIN14) | \ PIN_ODR_LOW(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \ PIN_AFIO_AF(GPIOG_PIN1, 0U) | \ PIN_AFIO_AF(GPIOG_PIN2, 0U) | \ PIN_AFIO_AF(GPIOG_PIN3, 0U) | \ PIN_AFIO_AF(GPIOG_PIN4, 0U) | \ PIN_AFIO_AF(GPIOG_PIN5, 0U) | \ PIN_AFIO_AF(GPIOG_PIN6, 0U) | \ PIN_AFIO_AF(GPIOG_PIN7, 8U)) #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 8U) | \ PIN_AFIO_AF(GPIOG_OCTOSPIM_P2_IO6, 5U) |\ PIN_AFIO_AF(GPIOG_OCTOSPIM_P2_IO7, 5U) |\ PIN_AFIO_AF(GPIOG_PIN11, 0U) | \ PIN_AFIO_AF(GPIOG_OCTOSPIM_P2_NCS, 5U) |\ PIN_AFIO_AF(GPIOG_PIN13, 0U) | \ PIN_AFIO_AF(GPIOG_PIN14, 0U) | \ PIN_AFIO_AF(GPIOG_OCTOSPIM_P2_DQS, 5U)) #define VAL_GPIOG_ASCR (PIN_ASCR_DISABLED(GPIOG_PIN0) | \ PIN_ASCR_DISABLED(GPIOG_PIN1) | \ PIN_ASCR_DISABLED(GPIOG_PIN2) | \ PIN_ASCR_DISABLED(GPIOG_PIN3) | \ PIN_ASCR_DISABLED(GPIOG_PIN4) | \ PIN_ASCR_DISABLED(GPIOG_PIN5) | \ PIN_ASCR_DISABLED(GPIOG_PIN6) | \ PIN_ASCR_DISABLED(GPIOG_PIN7) | \ PIN_ASCR_DISABLED(GPIOG_PIN8) | \ PIN_ASCR_DISABLED(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_ASCR_DISABLED(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_ASCR_DISABLED(GPIOG_PIN11) | \ PIN_ASCR_DISABLED(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_ASCR_DISABLED(GPIOG_PIN13) | \ PIN_ASCR_DISABLED(GPIOG_PIN14) | \ PIN_ASCR_DISABLED(GPIOG_OCTOSPIM_P2_DQS)) #define VAL_GPIOG_LOCKR (PIN_LOCKR_DISABLED(GPIOG_PIN0) | \ PIN_LOCKR_DISABLED(GPIOG_PIN1) | \ PIN_LOCKR_DISABLED(GPIOG_PIN2) | \ PIN_LOCKR_DISABLED(GPIOG_PIN3) | \ PIN_LOCKR_DISABLED(GPIOG_PIN4) | \ PIN_LOCKR_DISABLED(GPIOG_PIN5) | \ PIN_LOCKR_DISABLED(GPIOG_PIN6) | \ PIN_LOCKR_DISABLED(GPIOG_PIN7) | \ PIN_LOCKR_DISABLED(GPIOG_PIN8) | \ PIN_LOCKR_DISABLED(GPIOG_OCTOSPIM_P2_IO6) |\ PIN_LOCKR_DISABLED(GPIOG_OCTOSPIM_P2_IO7) |\ PIN_LOCKR_DISABLED(GPIOG_PIN11) | \ PIN_LOCKR_DISABLED(GPIOG_OCTOSPIM_P2_NCS) |\ PIN_LOCKR_DISABLED(GPIOG_PIN13) | \ PIN_LOCKR_DISABLED(GPIOG_PIN14) | \ PIN_LOCKR_DISABLED(GPIOG_OCTOSPIM_P2_DQS)) /* * GPIOH setup: * * PH0 - OSC_IN (analog). * PH1 - OSC_OUT (analog). * PH2 - PIN2 (analog). * PH3 - BOOT0 (input floating). * PH4 - LED LED_GREEN (output pushpull maximum). * PH5 - PIN5 (analog). * PH6 - PIN6 (analog). * PH7 - PIN7 (analog). * PH8 - OCTOSPIM_P2_IO3 (alternate 5). * PH9 - OCTOSPIM_P2_IO4 (alternate 5). * PH10 - OCTOSPIM_P2_IO5 (alternate 5). * PH11 - PIN11 (analog). * PH12 - PIN12 (analog). * PH13 - PIN13 (analog). * PH14 - PIN14 (analog). * PH15 - PIN15 (analog). */ #define VAL_GPIOH_MODER (PIN_MODE_ANALOG(GPIOH_OSC_IN) | \ PIN_MODE_ANALOG(GPIOH_OSC_OUT) | \ PIN_MODE_ANALOG(GPIOH_PIN2) | \ PIN_MODE_INPUT(GPIOH_BOOT0) | \ PIN_MODE_OUTPUT(GPIOH_LED) | \ PIN_MODE_ANALOG(GPIOH_PIN5) | \ PIN_MODE_ANALOG(GPIOH_PIN6) | \ PIN_MODE_ANALOG(GPIOH_PIN7) | \ PIN_MODE_ALTERNATE(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_MODE_ALTERNATE(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_MODE_ALTERNATE(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_MODE_ANALOG(GPIOH_PIN11) | \ PIN_MODE_ANALOG(GPIOH_PIN12) | \ PIN_MODE_ANALOG(GPIOH_PIN13) | \ PIN_MODE_ANALOG(GPIOH_PIN14) | \ PIN_MODE_ANALOG(GPIOH_PIN15)) #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOH_BOOT0) | \ PIN_OTYPE_PUSHPULL(GPIOH_LED) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_OTYPE_PUSHPULL(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_OTYPE_PUSHPULL(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_OSC_IN) | \ PIN_OSPEED_VERYLOW(GPIOH_OSC_OUT) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOH_BOOT0) | \ PIN_OSPEED_HIGH(GPIOH_LED) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \ PIN_OSPEED_HIGH(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_OSPEED_HIGH(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_OSPEED_HIGH(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOH_PIN15)) #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ PIN_PUPDR_FLOATING(GPIOH_BOOT0) | \ PIN_PUPDR_FLOATING(GPIOH_LED) | \ PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ PIN_PUPDR_FLOATING(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_PUPDR_FLOATING(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_PUPDR_FLOATING(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ PIN_PUPDR_FLOATING(GPIOH_PIN15)) #define VAL_GPIOH_ODR (PIN_ODR_LOW(GPIOH_OSC_IN) | \ PIN_ODR_LOW(GPIOH_OSC_OUT) | \ PIN_ODR_LOW(GPIOH_PIN2) | \ PIN_ODR_LOW(GPIOH_BOOT0) | \ PIN_ODR_HIGH(GPIOH_LED) | \ PIN_ODR_LOW(GPIOH_PIN5) | \ PIN_ODR_LOW(GPIOH_PIN6) | \ PIN_ODR_LOW(GPIOH_PIN7) | \ PIN_ODR_LOW(GPIOH_OCTOSPIM_P2_IO3) | \ PIN_ODR_LOW(GPIOH_OCTOSPIM_P2_IO4) | \ PIN_ODR_LOW(GPIOH_OCTOSPIM_P2_IO5) | \ PIN_ODR_LOW(GPIOH_PIN11) | \ PIN_ODR_LOW(GPIOH_PIN12) | \ PIN_ODR_LOW(GPIOH_PIN13) | \ PIN_ODR_LOW(GPIOH_PIN14) | \ PIN_ODR_LOW(GPIOH_PIN15)) #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \ PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \ PIN_AFIO_AF(GPIOH_PIN2, 0U) | \ PIN_AFIO_AF(GPIOH_BOOT0, 0U) | \ PIN_AFIO_AF(GPIOH_LED, 0U) | \ PIN_AFIO_AF(GPIOH_PIN5, 0U) | \ PIN_AFIO_AF(GPIOH_PIN6, 0U) | \ PIN_AFIO_AF(GPIOH_PIN7, 0U)) #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_OCTOSPIM_P2_IO3, 5U) |\ PIN_AFIO_AF(GPIOH_OCTOSPIM_P2_IO4, 5U) |\ PIN_AFIO_AF(GPIOH_OCTOSPIM_P2_IO5, 5U) |\ PIN_AFIO_AF(GPIOH_PIN11, 0U) | \ PIN_AFIO_AF(GPIOH_PIN12, 0U) | \ PIN_AFIO_AF(GPIOH_PIN13, 0U) | \ PIN_AFIO_AF(GPIOH_PIN14, 0U) | \ PIN_AFIO_AF(GPIOH_PIN15, 0U)) #define VAL_GPIOH_ASCR (PIN_ASCR_DISABLED(GPIOH_OSC_IN) | \ PIN_ASCR_DISABLED(GPIOH_OSC_OUT) | \ PIN_ASCR_DISABLED(GPIOH_PIN2) | \ PIN_ASCR_DISABLED(GPIOH_BOOT0) | \ PIN_ASCR_DISABLED(GPIOH_LED) | \ PIN_ASCR_DISABLED(GPIOH_PIN5) | \ PIN_ASCR_DISABLED(GPIOH_PIN6) | \ PIN_ASCR_DISABLED(GPIOH_PIN7) | \ PIN_ASCR_DISABLED(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_ASCR_DISABLED(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_ASCR_DISABLED(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_ASCR_DISABLED(GPIOH_PIN11) | \ PIN_ASCR_DISABLED(GPIOH_PIN12) | \ PIN_ASCR_DISABLED(GPIOH_PIN13) | \ PIN_ASCR_DISABLED(GPIOH_PIN14) | \ PIN_ASCR_DISABLED(GPIOH_PIN15)) #define VAL_GPIOH_LOCKR (PIN_LOCKR_DISABLED(GPIOH_OSC_IN) | \ PIN_LOCKR_DISABLED(GPIOH_OSC_OUT) | \ PIN_LOCKR_DISABLED(GPIOH_PIN2) | \ PIN_LOCKR_DISABLED(GPIOH_BOOT0) | \ PIN_LOCKR_DISABLED(GPIOH_LED) | \ PIN_LOCKR_DISABLED(GPIOH_PIN5) | \ PIN_LOCKR_DISABLED(GPIOH_PIN6) | \ PIN_LOCKR_DISABLED(GPIOH_PIN7) | \ PIN_LOCKR_DISABLED(GPIOH_OCTOSPIM_P2_IO3) |\ PIN_LOCKR_DISABLED(GPIOH_OCTOSPIM_P2_IO4) |\ PIN_LOCKR_DISABLED(GPIOH_OCTOSPIM_P2_IO5) |\ PIN_LOCKR_DISABLED(GPIOH_PIN11) | \ PIN_LOCKR_DISABLED(GPIOH_PIN12) | \ PIN_LOCKR_DISABLED(GPIOH_PIN13) | \ PIN_LOCKR_DISABLED(GPIOH_PIN14) | \ PIN_LOCKR_DISABLED(GPIOH_PIN15)) /* * GPIOI setup: * * PI0 - PIN0 (analog). * PI1 - PIN1 (analog). * PI2 - PIN2 (analog). * PI3 - PIN3 (analog). * PI4 - PIN4 (analog). * PI5 - PIN5 (analog). * PI6 - OCTOSPIM_P2_CLK (alternate 5). * PI7 - PIN7 (analog). * PI8 - PIN8 (analog). * PI9 - OCTOSPIM_P2_IO2 (alternate 5). * PI10 - OCTOSPIM_P2_IO1 (alternate 5). * PI11 - OCTOSPIM_P2_IO0 (alternate 5). * PI12 - PIN12 (analog). * PI13 - PIN13 (analog). * PI14 - PIN14 (analog). * PI15 - PIN15 (analog). */ #define VAL_GPIOI_MODER (PIN_MODE_ANALOG(GPIOI_PIN0) | \ PIN_MODE_ANALOG(GPIOI_PIN1) | \ PIN_MODE_ANALOG(GPIOI_PIN2) | \ PIN_MODE_ANALOG(GPIOI_PIN3) | \ PIN_MODE_ANALOG(GPIOI_PIN4) | \ PIN_MODE_ANALOG(GPIOI_PIN5) | \ PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_MODE_ANALOG(GPIOI_PIN7) | \ PIN_MODE_ANALOG(GPIOI_PIN8) | \ PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_MODE_ALTERNATE(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_MODE_ANALOG(GPIOI_PIN12) | \ PIN_MODE_ANALOG(GPIOI_PIN13) | \ PIN_MODE_ANALOG(GPIOI_PIN14) | \ PIN_MODE_ANALOG(GPIOI_PIN15)) #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_OTYPE_PUSHPULL(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOI_PIN0) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN1) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN2) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN3) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN4) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN5) | \ PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_OSPEED_VERYLOW(GPIOI_PIN7) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN8) | \ PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_OSPEED_HIGH(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_OSPEED_VERYLOW(GPIOI_PIN12) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN13) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN14) | \ PIN_OSPEED_VERYLOW(GPIOI_PIN15)) #define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_PUPDR_FLOATING(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ PIN_PUPDR_FLOATING(GPIOI_PIN15)) #define VAL_GPIOI_ODR (PIN_ODR_LOW(GPIOI_PIN0) | \ PIN_ODR_LOW(GPIOI_PIN1) | \ PIN_ODR_LOW(GPIOI_PIN2) | \ PIN_ODR_LOW(GPIOI_PIN3) | \ PIN_ODR_LOW(GPIOI_PIN4) | \ PIN_ODR_LOW(GPIOI_PIN5) | \ PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_CLK) | \ PIN_ODR_LOW(GPIOI_PIN7) | \ PIN_ODR_LOW(GPIOI_PIN8) | \ PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO2) | \ PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO1) | \ PIN_ODR_LOW(GPIOI_OCTOSPIM_P2_IO0) | \ PIN_ODR_LOW(GPIOI_PIN12) | \ PIN_ODR_LOW(GPIOI_PIN13) | \ PIN_ODR_LOW(GPIOI_PIN14) | \ PIN_ODR_LOW(GPIOI_PIN15)) #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \ PIN_AFIO_AF(GPIOI_PIN1, 0U) | \ PIN_AFIO_AF(GPIOI_PIN2, 0U) | \ PIN_AFIO_AF(GPIOI_PIN3, 0U) | \ PIN_AFIO_AF(GPIOI_PIN4, 0U) | \ PIN_AFIO_AF(GPIOI_PIN5, 0U) | \ PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_CLK, 5U) |\ PIN_AFIO_AF(GPIOI_PIN7, 0U)) #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \ PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO2, 5U) |\ PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO1, 5U) |\ PIN_AFIO_AF(GPIOI_OCTOSPIM_P2_IO0, 5U) |\ PIN_AFIO_AF(GPIOI_PIN12, 0U) | \ PIN_AFIO_AF(GPIOI_PIN13, 0U) | \ PIN_AFIO_AF(GPIOI_PIN14, 0U) | \ PIN_AFIO_AF(GPIOI_PIN15, 0U)) #define VAL_GPIOI_ASCR (PIN_ASCR_DISABLED(GPIOI_PIN0) | \ PIN_ASCR_DISABLED(GPIOI_PIN1) | \ PIN_ASCR_DISABLED(GPIOI_PIN2) | \ PIN_ASCR_DISABLED(GPIOI_PIN3) | \ PIN_ASCR_DISABLED(GPIOI_PIN4) | \ PIN_ASCR_DISABLED(GPIOI_PIN5) | \ PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_ASCR_DISABLED(GPIOI_PIN7) | \ PIN_ASCR_DISABLED(GPIOI_PIN8) | \ PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_ASCR_DISABLED(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_ASCR_DISABLED(GPIOI_PIN12) | \ PIN_ASCR_DISABLED(GPIOI_PIN13) | \ PIN_ASCR_DISABLED(GPIOI_PIN14) | \ PIN_ASCR_DISABLED(GPIOI_PIN15)) #define VAL_GPIOI_LOCKR (PIN_LOCKR_DISABLED(GPIOI_PIN0) | \ PIN_LOCKR_DISABLED(GPIOI_PIN1) | \ PIN_LOCKR_DISABLED(GPIOI_PIN2) | \ PIN_LOCKR_DISABLED(GPIOI_PIN3) | \ PIN_LOCKR_DISABLED(GPIOI_PIN4) | \ PIN_LOCKR_DISABLED(GPIOI_PIN5) | \ PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_CLK) |\ PIN_LOCKR_DISABLED(GPIOI_PIN7) | \ PIN_LOCKR_DISABLED(GPIOI_PIN8) | \ PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO2) |\ PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO1) |\ PIN_LOCKR_DISABLED(GPIOI_OCTOSPIM_P2_IO0) |\ PIN_LOCKR_DISABLED(GPIOI_PIN12) | \ PIN_LOCKR_DISABLED(GPIOI_PIN13) | \ PIN_LOCKR_DISABLED(GPIOI_PIN14) | \ PIN_LOCKR_DISABLED(GPIOI_PIN15)) /*===========================================================================*/ /* External declarations. */ /*===========================================================================*/ #if !defined(_FROM_ASM_) #ifdef __cplusplus extern "C" { #endif void boardInit(void); #ifdef __cplusplus } #endif #endif /* _FROM_ASM_ */ #endif /* BOARD_H */