3 Debug ARM 1 General 3 31 1 1 ExePath Debug\Exe ObjPath Debug\Obj ListPath Debug\List GEndianMode 0 Input description No specifier n, no float nor long long, no scan set, no assignment suppressing, without multibyte support. Output description No specifier a, A, no specifier n, no float nor long long, no flags, without multibyte support. GOutputBinary 0 OGCoreOrChip 1 GRuntimeLibSelect 0 1 GRuntimeLibSelectSlave 0 1 RTDescription Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod. OGProductVersion 5.10.0.159 OGLastSavedByProductVersion 8.42.2.24202 GeneralEnableMisra 0 GeneralMisraVerbose 0 OGChipSelectEditMenu STM32F303VC ST STM32F303VC GenLowLevelInterface 1 GEndianModeBE 1 OGBufferedTerminalOutput 0 GenStdoutInterface 0 GeneralMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 GeneralMisraVer 0 GeneralMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 RTConfigPath2 $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h GBECoreSlave 28 39 OGUseCmsis 0 OGUseCmsisDspLib 0 GRuntimeLibThreads 0 CoreVariant 28 39 GFPUDeviceSlave STM32F303VC ST STM32F303VC FPU2 0 4 NrRegs 0 1 NEON 0 GFPUCoreSlave2 28 39 OGCMSISPackSelectDevice OgLibHeap 0 OGLibAdditionalLocale 0 OGPrintfVariant 0 4 OGPrintfMultibyteSupport 0 OGScanfVariant 0 3 OGScanfMultibyteSupport 0 GenLocaleTags GenLocaleDisplayOnly DSPExtension 1 TrustZone 0 TrustZoneModes 0 0 ICCARM 2 36 1 1 CCOptimizationNoSizeConstraints 0 CCDefines TEST_CFG_SIZE_REPORT=0 CORTEX_USE_FPU=1 CCPreprocFile 0 CCPreprocComments 0 CCPreprocLine 0 CCListCFile 0 CCListCMnemonics 0 CCListCMessages 0 CCListAssFile 0 CCListAssSource 0 CCEnableRemarks 0 CCDiagSuppress CCDiagRemark CCDiagWarning CCDiagError CCObjPrefix 1 CCAllowList 1 00000000 CCDebugInfo 1 IEndianMode 1 IProcessor 1 IExtraOptionsCheck 0 IExtraOptions CCLangConformance 0 CCSignedPlainChar 1 CCRequirePrototypes 0 CCDiagWarnAreErr 0 CCCompilerRuntimeInfo 0 IFpuProcessor 1 OutputFile $FILE_BNAME$.o CCLibConfigHeader 1 PreInclude CompilerMisraOverride 0 CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\cfg $PROJ_DIR$\..\..\..\..\os\license $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\ext\ARM\CMSIS\Core\Include $PROJ_DIR$\..\..\..\..\os\common\ext\ST\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\portability\IAR $PROJ_DIR$\..\..\..\..\os\common\ports\ARM-common $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M $PROJ_DIR$\..\..\..\..\os\common\oslib\include $PROJ_DIR$\..\..\..\..\os\rt\include $PROJ_DIR$\..\..\..\..\os\oslib\include $PROJ_DIR$\..\..\..\..\os\hal\osal\rt-nil $PROJ_DIR$\..\..\..\..\os\hal\include $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SYSTICKv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1 $PROJ_DIR$\..\..\..\..\os\test\include $PROJ_DIR$\..\..\..\..\test\rt\source\test $PROJ_DIR$\..\..\..\..\test\oslib\source\test CCStdIncCheck 0 CCCodeSection .text IProcessorMode2 1 CCOptLevel 1 CCOptStrategy 0 0 CCOptLevelSlave 1 CompilerMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 CompilerMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 CCPosIndRopi 0 CCPosIndRwpi 0 CCPosIndNoDynInit 0 IccLang 0 IccCDialect 1 IccAllowVLA 0 IccStaticDestr 1 IccCppInlineSemantics 0 IccCmsis 1 IccFloatSemantics 0 CCNoLiteralPool 0 CCOptStrategySlave 0 0 CCGuardCalls 1 CCEncSource 0 CCEncOutput 0 CCEncOutputBom 1 CCEncInput 0 IccExceptions2 0 IccRTTI2 0 OICompilerExtraOption 1 CCStackProtection 0 AARM 2 10 1 1 AObjPrefix 1 AEndian 1 ACaseSensitivity 1 MacroChars 0 0 AWarnEnable 0 AWarnWhat 0 AWarnOne AWarnRange1 AWarnRange2 ADebug 1 AltRegisterNames 0 ADefines TEST_CFG_SIZE_REPORT=0 CORTEX_USE_FPU=1 AList 0 AListHeader 1 AListing 1 Includes 0 MacDefs 0 MacExps 1 MacExec 0 OnlyAssed 0 MultiLine 0 PageLengthCheck 0 PageLength 80 TabSpacing 8 AXRef 0 AXRefDefines 0 AXRefInternal 0 AXRefDual 0 AProcessor 1 AFpuProcessor 1 AOutputFile $FILE_BNAME$.o ALimitErrorsCheck 0 ALimitErrorsEdit 100 AIgnoreStdInclude 0 AUserIncludes $PROJ_DIR$\.. $PROJ_DIR$\..\cfg $PROJ_DIR$\..\..\..\..\os\license $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY AExtraOptionsCheckV2 0 AExtraOptionsV2 AsmNoLiteralPool 0 OBJCOPY 0 1 1 1 OOCOutputFormat 3 0 OCOutputOverride 0 OOCOutputFile ch.srec OOCCommandLineProducer 1 OOCObjCopyEnable 0 CUSTOM 3 0 BICOMP 0 BUILDACTION 1 ILINK 0 23 1 1 IlinkOutputFile ch.out IlinkLibIOConfig 1 XLinkMisraHandler 0 IlinkInputFileSlave 0 IlinkDebugInfoEnable 1 IlinkKeepSymbols IlinkRawBinaryFile IlinkRawBinarySymbol IlinkRawBinarySegment IlinkRawBinaryAlign IlinkDefines IlinkConfigDefines IlinkMapFile 1 IlinkLogFile 0 IlinkLogInitialization 0 IlinkLogModule 0 IlinkLogSection 0 IlinkLogVeneer 0 IlinkIcfOverride 1 IlinkIcfFile $PROJ_DIR$\ch.icf IlinkIcfFileSlave IlinkEnableRemarks 0 IlinkSuppressDiags IlinkTreatAsRem IlinkTreatAsWarn IlinkTreatAsErr IlinkWarningsAreErrors 0 IlinkUseExtraOptions 0 IlinkExtraOptions IlinkLowLevelInterfaceSlave 1 IlinkAutoLibEnable 1 IlinkAdditionalLibs IlinkOverrideProgramEntryLabel 0 IlinkProgramEntryLabelSelect 0 IlinkProgramEntryLabel __iar_program_start DoFill 0 FillerByte 0xFF FillerStart 0x0 FillerEnd 0x0 CrcSize 0 1 CrcAlign 1 CrcPoly 0x11021 CrcCompl 0 0 CrcBitOrder 0 0 CrcInitialValue 0x0 DoCrc 0 IlinkBE8Slave 1 IlinkBufferedTerminalOutput 1 IlinkStdoutInterfaceSlave 1 CrcFullSize 0 IlinkIElfToolPostProcess 0 IlinkLogAutoLibSelect 0 IlinkLogRedirSymbols 0 IlinkLogUnusedFragments 0 IlinkCrcReverseByteOrder 0 IlinkCrcUseAsInput 1 IlinkOptInline 0 IlinkOptExceptionsAllow 1 IlinkOptExceptionsForce 0 IlinkCmsis 1 IlinkOptMergeDuplSections 0 IlinkOptUseVfe 1 IlinkOptForceVfe 0 IlinkStackAnalysisEnable 0 IlinkStackControlFile IlinkStackCallGraphFile CrcAlgorithm 1 1 CrcUnitSize 0 0 IlinkThreadsSlave 1 IlinkLogCallGraph 0 IlinkIcfFile_AltDefault IlinkEncInput 0 IlinkEncOutput 0 IlinkEncOutputBom 1 IlinkHeapSelect 1 IlinkLocaleSelect 1 IlinkTrustzoneImportLibraryOut ch_import_lib.o OILinkExtraOption 1 IlinkRawBinaryFile2 IlinkRawBinarySymbol2 IlinkRawBinarySegment2 IlinkRawBinaryAlign2 IARCHIVE 0 0 1 1 IarchiveInputs IarchiveOverride 0 IarchiveOutput ###Unitialized### BILINK 0 Release ARM 0 General 3 31 1 0 ExePath Release\Exe ObjPath Release\Obj ListPath Release\List GEndianMode 0 Input description No specifier n, no float nor long long, no scan set, no assignment suppressing, without multibyte support. Output description No specifier a, A, no specifier n, no float nor long long, no flags, without multibyte support. GOutputBinary 0 OGCoreOrChip 1 GRuntimeLibSelect 0 1 GRuntimeLibSelectSlave 0 1 RTDescription Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod. OGProductVersion 5.10.0.159 OGLastSavedByProductVersion 8.42.2.24202 GeneralEnableMisra 0 GeneralMisraVerbose 0 OGChipSelectEditMenu STM32F303VC ST STM32F303VC GenLowLevelInterface 1 GEndianModeBE 1 OGBufferedTerminalOutput 0 GenStdoutInterface 0 GeneralMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 GeneralMisraVer 0 GeneralMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 RTConfigPath2 $TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h GBECoreSlave 28 39 OGUseCmsis 0 OGUseCmsisDspLib 0 GRuntimeLibThreads 0 CoreVariant 28 39 GFPUDeviceSlave STM32F303VC ST STM32F303VC FPU2 0 4 NrRegs 0 1 NEON 0 GFPUCoreSlave2 28 39 OGCMSISPackSelectDevice OgLibHeap 0 OGLibAdditionalLocale 0 OGPrintfVariant 0 4 OGPrintfMultibyteSupport 0 OGScanfVariant 0 3 OGScanfMultibyteSupport 0 GenLocaleTags GenLocaleDisplayOnly DSPExtension 1 TrustZone 0 TrustZoneModes 0 0 ICCARM 2 36 1 0 CCOptimizationNoSizeConstraints 0 CCDefines TEST_CFG_SIZE_REPORT=0 CORTEX_USE_FPU=1 CCPreprocFile 0 CCPreprocComments 0 CCPreprocLine 0 CCListCFile 0 CCListCMnemonics 0 CCListCMessages 0 CCListAssFile 0 CCListAssSource 0 CCEnableRemarks 0 CCDiagSuppress CCDiagRemark CCDiagWarning CCDiagError CCObjPrefix 1 CCAllowList 1 11111110 CCDebugInfo 1 IEndianMode 1 IProcessor 1 IExtraOptionsCheck 0 IExtraOptions CCLangConformance 0 CCSignedPlainChar 1 CCRequirePrototypes 0 CCDiagWarnAreErr 0 CCCompilerRuntimeInfo 0 IFpuProcessor 1 OutputFile $FILE_BNAME$.o CCLibConfigHeader 1 PreInclude CompilerMisraOverride 0 CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\cfg $PROJ_DIR$\..\..\..\..\os\license $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\ext\ARM\CMSIS\Core\Include $PROJ_DIR$\..\..\..\..\os\common\ext\ST\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\portability\IAR $PROJ_DIR$\..\..\..\..\os\common\ports\ARM-common $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M $PROJ_DIR$\..\..\..\..\os\common\oslib\include $PROJ_DIR$\..\..\..\..\os\rt\include $PROJ_DIR$\..\..\..\..\os\oslib\include $PROJ_DIR$\..\..\..\..\os\hal\osal\rt-nil $PROJ_DIR$\..\..\..\..\os\hal\include $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SYSTICKv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1 $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1 $PROJ_DIR$\..\..\..\..\os\test\include $PROJ_DIR$\..\..\..\..\test\rt\source\test $PROJ_DIR$\..\..\..\..\test\oslib\source\test $PROJ_DIR$\..\ CCStdIncCheck 0 CCCodeSection .text IProcessorMode2 1 CCOptLevel 3 CCOptStrategy 0 0 CCOptLevelSlave 3 CompilerMisraRules98 0 1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111 CompilerMisraRules04 0 111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111 CCPosIndRopi 0 CCPosIndRwpi 0 CCPosIndNoDynInit 0 IccLang 0 IccCDialect 1 IccAllowVLA 0 IccStaticDestr 1 IccCppInlineSemantics 0 IccCmsis 1 IccFloatSemantics 0 CCNoLiteralPool 0 CCOptStrategySlave 0 0 CCGuardCalls 1 CCEncSource 0 CCEncOutput 0 CCEncOutputBom 1 CCEncInput 0 IccExceptions2 0 IccRTTI2 0 OICompilerExtraOption 1 CCStackProtection 0 AARM 2 10 1 0 AObjPrefix 1 AEndian 1 ACaseSensitivity 1 MacroChars 0 0 AWarnEnable 0 AWarnWhat 0 AWarnOne AWarnRange1 AWarnRange2 ADebug 1 AltRegisterNames 0 ADefines TEST_CFG_SIZE_REPORT=0 CORTEX_USE_FPU=1 AList 0 AListHeader 1 AListing 1 Includes 0 MacDefs 0 MacExps 1 MacExec 0 OnlyAssed 0 MultiLine 0 PageLengthCheck 0 PageLength 80 TabSpacing 8 AXRef 0 AXRefDefines 0 AXRefInternal 0 AXRefDual 0 AProcessor 1 AFpuProcessor 1 AOutputFile $FILE_BNAME$.o ALimitErrorsCheck 0 ALimitErrorsEdit 100 AIgnoreStdInclude 0 AUserIncludes $PROJ_DIR$\.. $PROJ_DIR$\..\cfg $PROJ_DIR$\..\..\..\..\os\license $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\devices\STM32F3xx $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY AExtraOptionsCheckV2 0 AExtraOptionsV2 AsmNoLiteralPool 0 OBJCOPY 0 1 1 0 OOCOutputFormat 3 0 OCOutputOverride 0 OOCOutputFile ch.srec OOCCommandLineProducer 1 OOCObjCopyEnable 0 CUSTOM 3 0 BICOMP 0 BUILDACTION 1 ILINK 0 23 1 0 IlinkOutputFile ch.out IlinkLibIOConfig 1 XLinkMisraHandler 0 IlinkInputFileSlave 0 IlinkDebugInfoEnable 1 IlinkKeepSymbols IlinkRawBinaryFile IlinkRawBinarySymbol IlinkRawBinarySegment IlinkRawBinaryAlign IlinkDefines IlinkConfigDefines IlinkMapFile 1 IlinkLogFile 0 IlinkLogInitialization 0 IlinkLogModule 0 IlinkLogSection 0 IlinkLogVeneer 0 IlinkIcfOverride 1 IlinkIcfFile $PROJ_DIR$\ch.icf IlinkIcfFileSlave IlinkEnableRemarks 0 IlinkSuppressDiags IlinkTreatAsRem IlinkTreatAsWarn IlinkTreatAsErr IlinkWarningsAreErrors 0 IlinkUseExtraOptions 0 IlinkExtraOptions IlinkLowLevelInterfaceSlave 1 IlinkAutoLibEnable 1 IlinkAdditionalLibs IlinkOverrideProgramEntryLabel 0 IlinkProgramEntryLabelSelect 0 IlinkProgramEntryLabel __iar_program_start DoFill 0 FillerByte 0xFF FillerStart 0x0 FillerEnd 0x0 CrcSize 0 1 CrcAlign 1 CrcPoly 0x11021 CrcCompl 0 0 CrcBitOrder 0 0 CrcInitialValue 0x0 DoCrc 0 IlinkBE8Slave 1 IlinkBufferedTerminalOutput 1 IlinkStdoutInterfaceSlave 1 CrcFullSize 0 IlinkIElfToolPostProcess 0 IlinkLogAutoLibSelect 0 IlinkLogRedirSymbols 0 IlinkLogUnusedFragments 0 IlinkCrcReverseByteOrder 0 IlinkCrcUseAsInput 1 IlinkOptInline 0 IlinkOptExceptionsAllow 1 IlinkOptExceptionsForce 0 IlinkCmsis 1 IlinkOptMergeDuplSections 0 IlinkOptUseVfe 1 IlinkOptForceVfe 0 IlinkStackAnalysisEnable 0 IlinkStackControlFile IlinkStackCallGraphFile CrcAlgorithm 1 1 CrcUnitSize 0 0 IlinkThreadsSlave 1 IlinkLogCallGraph 0 IlinkIcfFile_AltDefault IlinkEncInput 0 IlinkEncOutput 0 IlinkEncOutputBom 1 IlinkHeapSelect 1 IlinkLocaleSelect 1 IlinkTrustzoneImportLibraryOut ch_import_lib.o OILinkExtraOption 1 IlinkRawBinaryFile2 IlinkRawBinarySymbol2 IlinkRawBinarySegment2 IlinkRawBinaryAlign2 IARCHIVE 0 0 1 0 IarchiveInputs IarchiveOverride 0 IarchiveOutput ###Unitialized### BILINK 0 Release cfg $PROJ_DIR$\..\cfg\chconf.h $PROJ_DIR$\..\cfg\halconf.h $PROJ_DIR$\..\cfg\mcuconf.h os common oslib include $PROJ_DIR$\..\..\..\..\os\oslib\include\chbsem.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chdelegates.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chfactory.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chjobs.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chlib.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chmboxes.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chmemcore.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chmemheaps.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chmempools.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chobjcaches.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chobjfifos.h $PROJ_DIR$\..\..\..\..\os\oslib\include\chpipes.h src $PROJ_DIR$\..\..\..\..\os\oslib\src\chdelegates.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chfactory.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chmboxes.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chmemcore.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chmemheaps.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chmempools.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chobjcaches.c $PROJ_DIR$\..\..\..\..\os\oslib\src\chpipes.c port $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M\chcore.c $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M\chcore.h $PROJ_DIR$\..\..\..\..\os\common\ports\ARMv7-M\compilers\IAR\chcoreasm.s startup $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\devices\STM32F3xx\cmparams.h $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\compilers\IAR\cstartup.s $PROJ_DIR$\..\..\..\..\os\common\startup\ARMCMx\compilers\IAR\vectors.s hal board $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY\board.c $PROJ_DIR$\..\..\..\..\os\hal\boards\ST_STM32F3_DISCOVERY\board.h include $PROJ_DIR$\..\..\..\..\os\hal\include\hal.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_adc.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_buffers.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_can.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_channels.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_crypto.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_dac.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_efl.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_files.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_flash.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_gpt.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_i2c.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_i2s.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_icu.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_ioblock.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_mac.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_mii.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_mmc_spi.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_mmcsd.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_objects.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_pal.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_persistent.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_pwm.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_queues.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_rtc.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_sdc.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_serial.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_serial_usb.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_sio.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_spi.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_st.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_streams.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_trng.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_uart.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_usb.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_usb_cdc.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_wdg.h $PROJ_DIR$\..\..\..\..\os\hal\include\hal_wspi.h lib streams $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.c $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.h $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.c $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.h port $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3\hal_adc_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3\hal_adc_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1\hal_can_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1\hal_can_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DACv1\hal_dac_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DACv1\hal_dac_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_gpt_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_gpt_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\hal_i2c_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\hal_i2c_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_i2s_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_i2s_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_icu_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_icu_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\hal_pal_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\hal_pal_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_pwm_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_pwm_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\hal_rtc_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\hal_rtc_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SDMMCv1\hal_sdc_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SDMMCv1\hal_sdc_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_serial_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_serial_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_spi_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_spi_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SYSTICKv1\hal_st_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SYSTICKv1\hal_st_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_uart_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_uart_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\hal_usb_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\hal_usb_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1\hal_wdg_lld.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1\hal_wdg_lld.h $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.c $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1\stm32_dma.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1\stm32_dma.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1\stm32_exti.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1\stm32_exti.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_isr.c $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_isr.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_rcc.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_registry.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\stm32_tim.h $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\stm32_usb.h src $PROJ_DIR$\..\..\..\..\os\hal\src\hal.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_adc.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_buffers.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_can.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_crypto.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_dac.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_efl.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_flash.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_gpt.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_i2c.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_i2s.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_icu.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mac.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mmc_spi.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mmcsd.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_pal.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_pwm.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_queues.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_rtc.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_sdc.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_serial.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_serial_usb.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_sio.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_spi.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_st.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_trng.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_uart.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_usb.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_wdg.c $PROJ_DIR$\..\..\..\..\os\hal\src\hal_wspi.c rt include $PROJ_DIR$\..\..\..\..\os\rt\include\ch.h $PROJ_DIR$\..\..\..\..\os\rt\include\chalign.h $PROJ_DIR$\..\..\..\..\os\rt\include\chchecks.h $PROJ_DIR$\..\..\..\..\os\rt\include\chcond.h $PROJ_DIR$\..\..\..\..\os\rt\include\chcustomer.h $PROJ_DIR$\..\..\..\..\os\rt\include\chdebug.h $PROJ_DIR$\..\..\..\..\os\rt\include\chdynamic.h $PROJ_DIR$\..\..\..\..\os\rt\include\chevents.h $PROJ_DIR$\..\..\..\..\os\rt\include\chinstances.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmsg.h $PROJ_DIR$\..\..\..\..\os\rt\include\chmtx.h $PROJ_DIR$\..\..\..\..\os\rt\include\chregistry.h $PROJ_DIR$\..\..\..\..\os\rt\include\chrfcu.h $PROJ_DIR$\..\..\..\..\os\rt\include\chschd.h $PROJ_DIR$\..\..\..\..\os\rt\include\chsem.h $PROJ_DIR$\..\..\..\..\os\rt\include\chstats.h $PROJ_DIR$\..\..\..\..\os\rt\include\chsys.h $PROJ_DIR$\..\..\..\..\os\rt\include\chsystypes.h $PROJ_DIR$\..\..\..\..\os\rt\include\chthreads.h $PROJ_DIR$\..\..\..\..\os\rt\include\chtm.h $PROJ_DIR$\..\..\..\..\os\rt\include\chtrace.h $PROJ_DIR$\..\..\..\..\os\rt\include\chvt.h src $PROJ_DIR$\..\..\..\..\os\rt\src\chcond.c $PROJ_DIR$\..\..\..\..\os\rt\src\chdebug.c $PROJ_DIR$\..\..\..\..\os\rt\src\chdynamic.c $PROJ_DIR$\..\..\..\..\os\rt\src\chevents.c $PROJ_DIR$\..\..\..\..\os\rt\src\chinstances.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmsg.c $PROJ_DIR$\..\..\..\..\os\rt\src\chmtx.c $PROJ_DIR$\..\..\..\..\os\rt\src\chregistry.c $PROJ_DIR$\..\..\..\..\os\rt\src\chrfcu.c $PROJ_DIR$\..\..\..\..\os\rt\src\chschd.c $PROJ_DIR$\..\..\..\..\os\rt\src\chsem.c $PROJ_DIR$\..\..\..\..\os\rt\src\chstats.c $PROJ_DIR$\..\..\..\..\os\rt\src\chsys.c $PROJ_DIR$\..\..\..\..\os\rt\src\chthreads.c $PROJ_DIR$\..\..\..\..\os\rt\src\chtm.c $PROJ_DIR$\..\..\..\..\os\rt\src\chtrace.c $PROJ_DIR$\..\..\..\..\os\rt\src\chvt.c various test lib $PROJ_DIR$\..\..\..\..\os\test\src\ch_test.c $PROJ_DIR$\..\..\..\..\os\test\include\ch_test.h $PROJ_DIR$\..\..\..\..\os\test\src\ch_test_printf.c source oslib $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_root.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_root.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_001.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_001.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_002.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_002.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_003.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_003.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_004.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_004.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_005.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_005.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_006.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_006.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_007.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_007.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_008.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_008.h $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_009.c $PROJ_DIR$\..\..\..\..\test\oslib\source\test\oslib_test_sequence_009.h rt $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_root.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_root.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_001.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_001.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_002.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_002.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_003.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_003.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_004.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_004.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_005.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_005.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_006.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_006.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_007.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_007.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_008.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_008.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_009.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_009.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_010.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_010.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_011.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_011.h $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_012.c $PROJ_DIR$\..\..\..\..\test\rt\source\test\rt_test_sequence_012.h $PROJ_DIR$\..\main.c