/* ------------------------------------------------------------------------- */ /* @file: startup_MKE06Z4.s */ /* @purpose: CMSIS Cortex-M0P Core Device Startup File */ /* MKE06Z4 */ /* @version: 1.0 */ /* @date: 2017-5-19 */ /* @build: b190918 */ /* ------------------------------------------------------------------------- */ /* */ /* Copyright 1997-2016 Freescale Semiconductor, Inc. */ /* Copyright 2016-2019 NXP */ /* All rights reserved. */ /* */ /* SPDX-License-Identifier: BSD-3-Clause */ /*****************************************************************************/ /* Version: GCC for ARM Embedded Processors */ /*****************************************************************************/ .syntax unified .arch armv6-m .section .isr_vector, "a" .align 2 .globl __isr_vector __isr_vector: .long __StackTop /* Top of Stack */ .long Reset_Handler /* Reset Handler */ .long NMI_Handler /* NMI Handler*/ .long HardFault_Handler /* Hard Fault Handler*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long SVC_Handler /* SVCall Handler*/ .long 0 /* Reserved*/ .long 0 /* Reserved*/ .long PendSV_Handler /* PendSV Handler*/ .long SysTick_Handler /* SysTick Handler*/ /* External Interrupts*/ .long Reserved16_IRQHandler /* Reserved interrupt*/ .long Reserved17_IRQHandler /* Reserved interrupt*/ .long Reserved18_IRQHandler /* Reserved interrupt*/ .long Reserved19_IRQHandler /* Reserved interrupt*/ .long Reserved20_IRQHandler /* Reserved interrupt*/ .long FTMRE_IRQHandler /* Command complete*/ .long PMC_IRQHandler /* Low-voltage warning*/ .long IRQ_IRQHandler /* External interrupt*/ .long I2C0_IRQHandler /* Single interrupt vector for all sources*/ .long I2C1_IRQHandler /* Single interrupt vector for all sources*/ .long SPI0_IRQHandler /* Single interrupt vector for all sources*/ .long SPI1_IRQHandler /* Single interrupt vector for all sources*/ .long UART0_IRQHandler /* Status and error*/ .long UART1_IRQHandler /* Status and error*/ .long UART2_IRQHandler /* Status and error*/ .long ADC_IRQHandler /* ADC conversion complete interrupt*/ .long ACMP0_IRQHandler /* Analog comparator 0 interrupt*/ .long FTM0_IRQHandler /* FTM0 single interrupt vector for all sources*/ .long FTM1_IRQHandler /* FTM1 single interrupt vector for all sources*/ .long FTM2_IRQHandler /* FTM2 single interrupt vector for all sources*/ .long RTC_IRQHandler /* RTC overflow*/ .long ACMP1_IRQHandler /* Analog comparator 1 interrupt*/ .long PIT_CH0_IRQHandler /* PIT CH0 overflow*/ .long PIT_CH1_IRQHandler /* PIT CH1 overflow*/ .long KBI0_IRQHandler /* Keyboard interrupt0*/ .long KBI1_IRQHandler /* Keyboard interrupt1*/ .long Reserved42_IRQHandler /* Reserved interrupt*/ .long ICS_IRQHandler /* Clock loss of lock*/ .long WDOG_IRQHandler /* Watchdog timeout*/ .long PWT_IRQHandler /* Single interrupt vector for all sources*/ .long MSCAN_1_IRQHandler /* MSCAN Rx Interrupt*/ .long MSCAN_2_IRQHandler /* MSCAN Tx, Err and Wake-up interrupt*/ .size __isr_vector, . - __isr_vector /* Flash Configuration */ .section .FlashConfig, "a" .long 0xFFFFFFFF .long 0xFFFFFFFF .long 0xFFFFFFFF .long 0xFFFEFFFF .text .thumb /* Reset Handler */ .thumb_func .align 2 .globl Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: cpsid i /* Mask interrupts */ .equ VTOR, 0xE000ED08 ldr r0, =VTOR ldr r1, =__isr_vector str r1, [r0] ldr r2, [r1] msr msp, r2 #ifndef __NO_SYSTEM_INIT ldr r0,=SystemInit blx r0 #endif /* Loop to copy data from read only memory to RAM. The ranges * of copy from/to are specified by following symbols evaluated in * linker script. * __etext: End of code section, i.e., begin of data sections to copy from. * __data_start__/__data_end__: RAM address range that data should be * copied to. Both must be aligned to 4 bytes boundary. */ ldr r1, =__etext ldr r2, =__data_start__ ldr r3, =__data_end__ subs r3, r2 ble .LC0 .LC1: subs r3, 4 ldr r0, [r1,r3] str r0, [r2,r3] bgt .LC1 .LC0: #ifdef __STARTUP_CLEAR_BSS /* This part of work usually is done in C library startup code. Otherwise, * define this macro to enable it in this startup. * * Loop to zero out BSS section, which uses following symbols * in linker script: * __bss_start__: start of BSS section. Must align to 4 * __bss_end__: end of BSS section. Must align to 4 */ ldr r1, =__bss_start__ ldr r2, =__bss_end__ subs r2, r1 ble .LC3 movs r0, 0 .LC2: subs r2, 4 str r0, [r1, r2] bge .LC2 .LC3: #endif cpsie i /* Unmask interrupts */ #ifndef __START #define __START _start #endif #ifndef __ATOLLIC__ ldr r0,=__START blx r0 #else ldr r0,=__libc_init_array blx r0 ldr r0,=main bx r0 #endif .pool .size Reset_Handler, . - Reset_Handler .align 1 .thumb_func .weak DefaultISR .type DefaultISR, %function DefaultISR: ldr r0, =DefaultISR bx r0 .size DefaultISR, . - DefaultISR .align 1 .thumb_func .weak NMI_Handler .type NMI_Handler, %function NMI_Handler: ldr r0,=NMI_Handler bx r0 .size NMI_Handler, . - NMI_Handler .align 1 .thumb_func .weak HardFault_Handler .type HardFault_Handler, %function HardFault_Handler: ldr r0,=HardFault_Handler bx r0 .size HardFault_Handler, . - HardFault_Handler .align 1 .thumb_func .weak SVC_Handler .type SVC_Handler, %function SVC_Handler: ldr r0,=SVC_Handler bx r0 .size SVC_Handler, . - SVC_Handler .align 1 .thumb_func .weak PendSV_Handler .type PendSV_Handler, %function PendSV_Handler: ldr r0,=PendSV_Handler bx r0 .size PendSV_Handler, . - PendSV_Handler .align 1 .thumb_func .weak SysTick_Handler .type SysTick_Handler, %function SysTick_Handler: ldr r0,=SysTick_Handler bx r0 .size SysTick_Handler, . - SysTick_Handler .align 1 .thumb_func .weak I2C0_IRQHandler .type I2C0_IRQHandler, %function I2C0_IRQHandler: ldr r0,=I2C0_DriverIRQHandler bx r0 .size I2C0_IRQHandler, . - I2C0_IRQHandler .align 1 .thumb_func .weak I2C1_IRQHandler .type I2C1_IRQHandler, %function I2C1_IRQHandler: ldr r0,=I2C1_DriverIRQHandler bx r0 .size I2C1_IRQHandler, . - I2C1_IRQHandler .align 1 .thumb_func .weak SPI0_IRQHandler .type SPI0_IRQHandler, %function SPI0_IRQHandler: ldr r0,=SPI0_DriverIRQHandler bx r0 .size SPI0_IRQHandler, . - SPI0_IRQHandler .align 1 .thumb_func .weak SPI1_IRQHandler .type SPI1_IRQHandler, %function SPI1_IRQHandler: ldr r0,=SPI1_DriverIRQHandler bx r0 .size SPI1_IRQHandler, . - SPI1_IRQHandler .align 1 .thumb_func .weak UART0_IRQHandler .type UART0_IRQHandler, %function UART0_IRQHandler: ldr r0,=UART0_DriverIRQHandler bx r0 .size UART0_IRQHandler, . - UART0_IRQHandler .align 1 .thumb_func .weak UART1_IRQHandler .type UART1_IRQHandler, %function UART1_IRQHandler: ldr r0,=UART1_DriverIRQHandler bx r0 .size UART1_IRQHandler, . - UART1_IRQHandler .align 1 .thumb_func .weak UART2_IRQHandler .type UART2_IRQHandler, %function UART2_IRQHandler: ldr r0,=UART2_DriverIRQHandler bx r0 .size UART2_IRQHandler, . - UART2_IRQHandler .align 1 .thumb_func .weak RTC_IRQHandler .type RTC_IRQHandler, %function RTC_IRQHandler: ldr r0,=RTC_DriverIRQHandler bx r0 .size RTC_IRQHandler, . - RTC_IRQHandler .align 1 .thumb_func .weak MSCAN_1_IRQHandler .type MSCAN_1_IRQHandler, %function MSCAN_1_IRQHandler: ldr r0,=MSCAN_DriverIRQHandler bx r0 .size MSCAN_1_IRQHandler, . - MSCAN_1_IRQHandler .align 1 .thumb_func .weak MSCAN_2_IRQHandler .type MSCAN_2_IRQHandler, %function MSCAN_2_IRQHandler: ldr r0,=MSCAN_DriverIRQHandler bx r0 .size MSCAN_2_IRQHandler, . - MSCAN_2_IRQHandler /* Macro to define default handlers. Default handler * will be weak symbol and just dead loops. They can be * overwritten by other handlers */ .macro def_irq_handler handler_name .weak \handler_name .set \handler_name, DefaultISR .endm /* Exception Handlers */ def_irq_handler Reserved16_IRQHandler def_irq_handler Reserved17_IRQHandler def_irq_handler Reserved18_IRQHandler def_irq_handler Reserved19_IRQHandler def_irq_handler Reserved20_IRQHandler def_irq_handler FTMRE_IRQHandler def_irq_handler PMC_IRQHandler def_irq_handler IRQ_IRQHandler def_irq_handler I2C0_DriverIRQHandler def_irq_handler I2C1_DriverIRQHandler def_irq_handler SPI0_DriverIRQHandler def_irq_handler SPI1_DriverIRQHandler def_irq_handler UART0_DriverIRQHandler def_irq_handler UART1_DriverIRQHandler def_irq_handler UART2_DriverIRQHandler def_irq_handler ADC_IRQHandler def_irq_handler ACMP0_IRQHandler def_irq_handler FTM0_IRQHandler def_irq_handler FTM1_IRQHandler def_irq_handler FTM2_IRQHandler def_irq_handler RTC_DriverIRQHandler def_irq_handler ACMP1_IRQHandler def_irq_handler PIT_CH0_IRQHandler def_irq_handler PIT_CH1_IRQHandler def_irq_handler KBI0_IRQHandler def_irq_handler KBI1_IRQHandler def_irq_handler Reserved42_IRQHandler def_irq_handler ICS_IRQHandler def_irq_handler WDOG_IRQHandler def_irq_handler PWT_IRQHandler def_irq_handler MSCAN_DriverIRQHandler .end