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charRESERVED_40RESERVED_41RESERVED_42RESERVED_43RESERVED_44RESERVED_45RESERVED_46RESERVED_47PLL0PDECAHBMATPRIOV_DCDC_1P025ldo_ao_trimCPBOOTREFFASTWKUPkCLOCK_FreqmeDIEIDp_lp_modekCLOCK_Gpio_SecPDRUNCFG0u8IECXinCapCal8pFlowpower_set_dcdc_power_profileSTARTERPOWER_EnterSleepPOWER_EnterPowerDownkFRO1M_to_HSLSPIXO_CAL_CMD_clock_attach_idBODCORENMISRCibXinICPRPROCESS_CORNER_FFFMCLKCLKSELCPUCTRLkFRO_HF_DIV_to_HSLSPIPLL0NDECuint64_t__set_PRIMASKTIMERCOUNTkRESET_CAUSE_PADRESETkFRO12M_to_PLL0kFRO12M_to_PLL1kMAIN_CLK_to_USB0_CLKPOWERCYCLECLOCK_u8OscCapConvertkNONE_to_MCLK_exitvectorFCCLKSELV_DCDC_1P050kFRO32K_to_OSC32KkFRO1M_to_SYSTICK0PLL1_TESTSTATLDOUSBHSpvt_ringo_hzV_AO_0P775FLEXFRGXCTRLV_DCDC_1P100lf_wakeup_io_ctrlKEY_BLOCKkCLOCK_MinUart0kCLOCK_MinUart1kCLOCK_MinUart2kCLOCK_MinUart3kCLOCK_MinUart4kCLOCK_MinUart5kCLOCK_MinUart6kCLOCK_MinUart7kFRO12M_to_HSLSPIkCLOCK_DivFlexFrg0kCLOCK_DivFlexFrg1kCLOCK_DivFlexFrg2kCLOCK_DivFlexFrg3kCLOCK_DivFlexFrg4ICSRkCLOCK_DivFlexFrg6kCLOCK_DivFlexFrg7kPLL0_to_SDIO_CLKkFRO_HF_to_CTIMER4kCLOCK_Usbh1kMAIN_CLK_to_CLKOUTWAKEUPIOSRCkPLL0_to_CLKOUTV_DCDC_1P075kCLOCK_DivAdcAsyncClkkRESET_CAUSE_POR_v_aoPRESETCTRLADCCLKDIVDCCSWV_AO_1P100STARTERSETSYSCON_TypekRESET_CAUSE_DPDRESET_WAKEUPIO_OSTIMERkCLOCK_InputMuxkPDRUNCFG_PD_FRO192MkCLOCK_UsbRam1FLEXFRG5CTRLV_DCDC_1P125Chip_GetVersionCAPTCLKSELFRO32KAUX_BIASuint8_tUSB0NEEDCLKCTRLDCDC_POWER_PROFILE_LOWpi32_16MfXtalIecLoadpF_x100ADC_CTRLiaXout_x4p_dcdc_voltageXTAL32KD:/02-work/git_repo/mcu-sdk-2-2/mcu-sdk-2.0/devices/LPC55S69/fsl_power_lib/fsl_power_lib.ckNONE_to_USB0_CLKCSSELRDUMMY_STATUSlv_low_power_mode_cfgkFRO_HF_to_MCLKkCLOCK_Sram1kCLOCK_Sram2PRESETCTRLSETkCLOCK_Sram4kCLOCK_Utick0IRQLATD:\02-work\git_repo\mcu-sdk-2-2\mcu-sdk-2.0\devices\LPC55S69\fsl_power_lib\mcux\SoftkCLOCK_EzhakCLOCK_EzhbkMCLK_to_CTIMER0kMCLK_to_CTIMER1kMCLK_to_CTIMER2kMCLK_to_CTIMER3kMCLK_to_CTIMER4NVIC_TypekCLOCK_FmcV_DCDC_1P150kSYSTICK_DIV0_to_SYSTICK0ICIALLUFLEXFRG2CTRLFREQ_ME_CTRLV_DCDC_1P200kCLOCK_InputMux1lowpower_set_system_voltagekRESET_CAUSE_ARMSYSTEMRESETRESERVED_19kRESET_CAUSE_SWRRESET_number_of_exit_functionspmskCOMP_INT_STATUS_clock_div_namekFRO_HF_to_SDIO_CLKROMCTRLkPDRUNCFG_PD_LDOXO32MV_DCDC_1P175PLL1CLKSELSYSTICKCLKSELkCLOCK_Usbd0kCLOCK_Usbd1ANACTRL_TypekPDRUNCFG_PD_LDODEEPSLEEPkOSC32K_to_TRACEkCLOCK_CompV_DEEPSLEEP_1P000lv_v_ldo_pmu_boostkPLL0_to_MAIN_CLKSHCSRRESERVED_29CPURETCTRLkMAIN_CLK_to_SCT_CLKPERIPHENCFGFMCFLUSHSRAMCTRLlv_dcdc_mvV_AO_1P000FROHFDIVkCLOCK_Gpio0kCLOCK_Gpio1kCLOCK_Gpio2kCLOCK_Gpio3_interrupts_offRTCOSC32KV_AO_1P010kRESET_CAUSE_NOT_RELEVANTkRESET_CAUSE_WDTRESETV_DEEPSLEEP_1P025USB0CLKSELdcdc_voltageAUTOCLKGATEOVERRIDEpvt_ringo_1AIRCRFLASHBANKENABLEu8OscCapdcdcTrimValue0dcdcTrimValue1CODESECURITYPROTTESTLDODEEPSLEEPV_AO_1P020POWERDOWNSAFETYCOMPPLL1STATkCLOCK_PufmemsetkPDRUNCFG_ForceUnsignedresultDCCIMVACpower_device_boot_mode_tBUFFERINGAHB2VPB1V_AO_1P030pi32_16MfXtalNPcbParCappF_x100pvt_ringo_0ID_MMFRV_DCDC_1P000LowpowerDriverInterfacekMCLK_to_SCT_CLKkCLOCK_PvtHWWAKEpmc_reset_ctrlkMAIN_CLK_to_CTIMER2EFUSECLKCTRLkMAIN_CLK_to_CTIMER3kRESET_CAUSE_BODRESETkCLOCK_Dma0kCLOCK_Dma1FRO192M_STATUSV_AO_1P040LDO_XO32MkCLOCK_SysctlkCLOCK_FlashFMCCRkCLOCK_Usb1ClkkCLOCK_HashCryptcpu_retention_ctrlkNONE_to_FLEXCOMM0WAKEUPIOCTRLkNONE_to_FLEXCOMM2kNONE_to_FLEXCOMM3kNONE_to_FLEXCOMM4kNONE_to_FLEXCOMM5kNONE_to_FLEXCOMM6kNONE_to_FLEXCOMM7PMC_DCDC1_DEFAULTV_AO_1P050pi32_32kfXtalPPcbParCappF_x100GPIOPSYNCshort unsigned intBUFFERINGAHB2VPB0signed charkPDRUNCFG_PD_FRO32KkFRO_HF_to_CLKOUTkCLOCK_DivClkOutlowpower_get_part_process_cornerkRESET_CAUSE_DPDRESET_WAKEUPIODEBUG_FEATURES_DPkRESET_CAUSE_CDOGRESETXO_CAL_STATUSkPDRUNCFG_PD_LDOUSBHSkOSC32K_to_CTIMER0kOSC32K_to_CTIMER1kOSC32K_to_CTIMER2kOSC32K_to_CTIMER3kOSC32K_to_CTIMER4kOSC32K_to_FLEXCOMM1V_DEEPSLEEP_1P075lv_ldo_ao_mvlv_v_ldo_pmukOSC32K_to_FLEXCOMM7STATUSPLL1PDECboot_mode_regkCLOCK_BI2c0kCLOCK_BI2c1kCLOCK_BI2c2kCLOCK_BI2c3kCLOCK_BI2c4COMP_INT_CTRLkCLOCK_BI2c6kCLOCK_BI2c7kCLOCK_Timer2SystemCoreClockkCLOCK_Timer4reset_cause_regPOWER_Xtal16mhzCapabankTrimu32RegValXO32M_STATUSPROCESS_CORNER_OTHERSkCLOCK_Rnglv_ldo_ao_boostDCDC_POWER_PROFILE_HIGHSHPRTIMERCFGV_AO_1P120MVFR0MVFR1MVFR2V_AO_1P080LDOMEMPOWER_SetVoltageForFreqPRESETCTRL0PRESETCTRL1PRESETCTRL2kCLOCK_RomTIMEOUTPLL1NDECPRESETCTRLXV_AO_1P130kPDRUNCFG_PD_FRO1MV_AO_1P090analog_ctrl_regsSTATUSPWRkNONE_to_PLL0kNONE_to_PLL1POWER_SetXtal16mhzTrimPOWER_EnterDeepPowerDownlong intkFRO_HF_to_USB0_CLKOSTIMERrV_AO_1P140_v_dcdcAHBCLKDIVCCSIDRkCLOCK_LSpi0kCLOCK_LSpi1kCLOCK_LSpi2kCLOCK_LSpi3kCLOCK_LSpi4kCLOCK_LSpi5kCLOCK_LSpi6kCLOCK_LSpi7ANALOG_CTRL_CFGSWR_RESETANALOG_CTRL_STATUSkCLOCK_DivFlexFrg5system_voltage_mvu32XOTrimValuekMCLK_to_FLEXCOMM0kMCLK_to_FLEXCOMM1kMCLK_to_FLEXCOMM2kMCLK_to_FLEXCOMM3kMCLK_to_FLEXCOMM4kMCLK_to_FLEXCOMM5kMCLK_to_FLEXCOMM6kMCLK_to_FLEXCOMM7STIRkBOOT_MODE_LP_DEEP_POWER_DOWNV_AO_1P160V_AO_1P150MCLKDIVexclude_from_pdsystem_freq_hzkFRO_HF_DIV_to_FLEXCOMM0kFRO_HF_DIV_to_FLEXCOMM1kFRO_HF_DIV_to_FLEXCOMM2kFRO_HF_DIV_to_FLEXCOMM3kFRO_HF_DIV_to_FLEXCOMM4kFRO_HF_DIV_to_FLEXCOMM5kFRO_HF_DIV_to_FLEXCOMM6kFRO_HF_DIV_to_FLEXCOMM7uint32_tISERkFRO1M_to_SYSTICK1POWER_SetXtal16mhzLdopi32_32kfXtalIecLoadpF_x100RAMSIZECFGVOLTAGEGNU C99 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] -mcpu=cortex-m33 -mthumb -mfloat-abi=soft -march=armv8-m.main+dsp -g -Os -std=c99 -fno-common -fmessage-length=0 -fno-builtin -ffunction-sections -fdata-sections -fsingle-precision-constant -fstack-usageDICE_REG0DICE_REG1DICE_REG2FRO192M_CTRLDICE_REG4DICE_REG5DICE_REG6DICE_REG7clock_ip_name_tV_AO_0P960FLEXFRG6CTRLkPLL0_DIV_to_FLEXCOMM3wakeup_io_ctrlkPLL0_DIV_to_FLEXCOMM6kPLL0_DIV_to_FLEXCOMM7kPLL0_to_MCLKMAINCLKSAFETYkCLOCK_IpInvalidkCLOCK_DivAhbClkWAKEUPSRCkCLOCK_RtcAHBCLKCTRLCLRkPDRUNCFG_PD_RNGV_AO_1P220kCLOCK_Usbhsl0PLL0_TESTCTRLpower_device_reset_cause_tMCLKIOMAINCLKSELAMAINCLKSELBPOWER_GetWakeUpCausekRESET_CAUSE_DPDRESET_RTC_OSTIMERkPDRUNCFG_PD_BODVBATkBOOT_MODE_LP_POWER_DOWNV_AO_0P970TRACECLKDIVUSB1NEEDCLKCTRLCLIDRCPU0STCKCALCPSTATu32ValuekCLOCK_DivSctClkCPU0NSTCKCALkCLOCK_WwdtkEXT_CLK_to_CLKOUTSCB_TypeFLEXFRG3CTRLLPC_LOWPOWER_TCFSRCPU1STCKCALkPLL0_to_USB0_CLKdeviceRevisionRINGO2_CTRLkNONE_to_CTIMER1kNONE_to_CTIMER2kNONE_to_CTIMER3kNONE_to_CTIMER4kPDRUNCFG_PD_ROMNSACRID_ADRlowpower_set_voltage_for_processkPDRUNCFG_PD_BIASDUMMY_CTRLkCLOCK_FlexI2s0kCLOCK_DivFrohfClkPLL0CTRLRINGO1_CTRLkMAIN_CLK_to_FLEXCOMM0kMAIN_CLK_to_FLEXCOMM1kMAIN_CLK_to_FLEXCOMM2kMAIN_CLK_to_FLEXCOMM3kMAIN_CLK_to_FLEXCOMM4kMAIN_CLK_to_FLEXCOMM5kCLOCK_Timer0kCLOCK_Timer1OSC_TESTBUSkCLOCK_Timer3CTIMERCLKSEL0CTIMERCLKSEL1CTIMERCLKSEL2CTIMERCLKSEL3CTIMERCLKSEL4kEXT_CLK_to_PLL0kEXT_CLK_to_PLL1PROCESS_CORNER_SSSRINGO0_CTRLkPLL1_to_SDIO_CLKAFSRMISCCTRLCTIMERCLKSELXkOSC32K_to_CLKOUTSDIOCLKDIVDEBUG_AUTH_BEACONkFRO1M_to_MAIN_CLKCPSTACKDEBUG_LOCK_ENdoublekPDRUNCFG_PD_LDOMEMMEMORYREMAPPOWER_EnterDeepSleepkFRO12M_to_MAIN_CLKlowpower_driver_interface_tkPLL0_DIV_to_HSLSPIFLEXFRG0CTRLkPDRUNCFG_PD_USB0_PHY_v_deepsleepu32MaskLDOFLASHNVkFRO_HF_to_SCT_CLKSYSTICKCLKSEL0SYSTICKCLKSEL1XO32M_CTRLkCLOCK_DivPll0ClkHSLSPICLKSELkPDRUNCFG_PD_TEMPSENSAUX_TESTBUSSYSTICKCLKSELXUSB0NEEDCLKSTATDEVICE_ID0FRO1MkCLOCK_FlexI2s1kCLOCK_FlexI2s2kCLOCK_FlexI2s3kCLOCK_FlexI2s4kCLOCK_FlexI2s5kCLOCK_FlexI2s6kCLOCK_FlexI2s7CLKOUTDIVkCLOCK_GintV_DEEPSLEEP_1P050kCLOCK_DivSystickClk1u8XOCapOutCtrlkCLOCK_PluLutRESERVED0RESERVED2RESERVED3RESERVED4RESERVED5RESERVED6V_AO_0P700p_wakeup_io_ctrlwakeup_src_intBOD_DCDC_INT_STATUSkNONE_to_FLEXCOMM1ISPRlv_dcdcSCTCLKDIVkCLOCK_BI2c5SDIOCLKSELu8XOCapInCtrlPLL0CLKDIVCLOCK_EnableClockkMAIN_CLK_to_ADC_CLKCPACRITM_RxBufferkCLOCK_DivWdtClklong long unsigned intkSYSTICK_DIV1_to_SYSTICK1kPLL0_to_CTIMER0kPLL0_to_CTIMER1kPLL0_to_CTIMER2kPLL0_to_CTIMER3kPLL0_to_CTIMER4TIMEOUTEVENTSkFRO1M_to_FLEXCOMM0kFRO1M_to_FLEXCOMM1kFRO1M_to_FLEXCOMM2kFRO1M_to_FLEXCOMM3kFRO1M_to_FLEXCOMM4kFRO1M_to_FLEXCOMM5kFRO1M_to_FLEXCOMM6kFRO1M_to_FLEXCOMM7V_AO_0P725IABR_power_device_boot_modeV_DCDC_0P950CLOCK_AttachClkWDTCLKDIVkNONE_to_NONEkNONE_to_ADC_CLKPLL1_TESTCTRLCPUIDSRAMRETCTRLPMC_DCDC0_DEFAULTu8XOSlavekCLOCK_DivSystickClk0PLL0SSCG0PLL0SSCG1u8IECXoutCapCal6pFUSBHS_PHY_TRIMkNONE_to_TRACEuse_external_pullupdownITNSkFRO1M_to_TRACEV_DCDC_0P975kPDRUNCFG_PD_PLL0_SSCGkCLOCK_MailboxvoltagekFRO_HF_to_MAIN_CLKkFRO1M_to_CLKOUTINVERTMAINCLKV_AO_0P750kRESET_CAUSE_DPDRESET_RTCCLOCK_CTRLBODVBATkPDRUNCFG_PD_GPADCSTARTERCLRlong long intPOWER_GetLibVersionCTIMERCLKSELDCIMVACV_AO_0P800DCISWAHBCLKCTRL0AHBCLKCTRL1AHBCLKCTRL2ibXoutFLEXFRGCTRLmisc_ctrl_regAHBCLKCTRLXWAKEIOCAUSEkCLOCK_DivUsb0ClkHARDWARESLEEPDICE_REG3pi32_16MfXtalPPcbParCappF_x100u8CapBankDiscontinuitypriMaskPRESETCTRLCLRdcdc_power_profileBFARV_AO_1P060kCLOCK_PowerQuadV_AO_0P825WAKEUPINTkPLL1_to_USB0_CLKkPDRUNCFG_PD_PLL0kPDRUNCFG_PD_PLL1sram_retention_ctrlV_AO_0P990FUNCRETENTIONCTRLlowpower_dcdc_power_profile_enumcpu0_nmi_enablePMUTESTBUSRESETCTRLunsigned intUSBHS_PHY_STATUSp_lowpower_cfgCONFIGLOCKOUT__get_PRIMASKCAPTCLKDIVFLEXFRG7CTRLMMFARCLOCKGENUPDATELOCKOUTV_AO_1P110kPLL0_to_ADC_CLK_power_device_reset_causeV_AO_1P070short intICIMVAUwakeup_interruptskPDRUNCFG_PD_BODCORElv_ldo_aokCLOCK_Gpio_Sec_IntFLASHSIZECFGkPDRUNCFG_PD_COMPV_AO_0P850V_DEEPSLEEP_0P900wake_up_typeGCC: (GNU Tools for Arm Embedded Processors 9-2019-q4-major) 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] | "C A $BBXq,dB$ C$, B A`  B   C  0 B  AA3aeabi)8-M.MAINM "."*FIF]Fp  F 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