/*
** ###################################################################
**     Processors:          K32L2B21VFM0A
**                          K32L2B21VFT0A
**                          K32L2B21VLH0A
**                          K32L2B21VMP0A
**
**     Compilers:           Freescale C/C++ for Embedded ARM
**                          GNU C Compiler
**                          IAR ANSI C/C++ Compiler for ARM
**                          Keil ARM C/C++ Compiler
**                          MCUXpresso Compiler
**
**     Reference manual:    K32L2B3xRM, Rev.0, July 2019
**     Version:             rev. 1.0, 2019-07-30
**     Build:               b190925
**
**     Abstract:
**         Provides a system configuration function and a global variable that
**         contains the system frequency. It configures the device and initializes
**         the oscillator (PLL) that is part of the microcontroller device.
**
**     Copyright 2016 Freescale Semiconductor, Inc.
**     Copyright 2016-2019 NXP
**     All rights reserved.
**
**     SPDX-License-Identifier: BSD-3-Clause
**
**     http:                 www.nxp.com
**     mail:                 support@nxp.com
**
**     Revisions:
**     - rev. 1.0 (2019-07-30)
**         Initial version.
**
** ###################################################################
*/

/*!
 * @file K32L2B21A
 * @version 1.0
 * @date 2019-07-30
 * @brief Device specific configuration file for K32L2B21A (implementation file)
 *
 * Provides a system configuration function and a global variable that contains
 * the system frequency. It configures the device and initializes the oscillator
 * (PLL) that is part of the microcontroller device.
 */

#include <stdint.h>
#include "fsl_device_registers.h"

/* ----------------------------------------------------------------------------
   -- Core clock
   ---------------------------------------------------------------------------- */

uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;

/* ----------------------------------------------------------------------------
   -- SystemInit()
   ---------------------------------------------------------------------------- */

void SystemInit(void)
{
#if (ACK_ISOLATION)
    if ((PMC->REGSC & PMC_REGSC_ACKISO_MASK) != 0U)
    {
        PMC->REGSC |= PMC_REGSC_ACKISO_MASK; /* VLLSx recovery */
    }
#endif

#if (DISABLE_WDOG)
    /* SIM->COPC: ?=0,COPCLKSEL=0,COPDBGEN=0,COPSTPEN=0,COPT=0,COPCLKS=0,COPW=0 */
    SIM->COPC = (uint32_t)0x00u;
#endif /* (DISABLE_WDOG) */

    SystemInitHook();
}

/* ----------------------------------------------------------------------------
   -- SystemCoreClockUpdate()
   ---------------------------------------------------------------------------- */

void SystemCoreClockUpdate(void)
{
    uint32_t MCGOUTClock; /* Variable to store output clock frequency of the MCG module */
    uint16_t Divider;

    if ((MCG->S & MCG_S_CLKST_MASK) == 0x00U)
    {
        /* High internal reference clock is selected */
        MCGOUTClock = CPU_INT_FAST_CLK_HZ; /* Fast internal reference clock selected */
    }
    else if ((MCG->S & MCG_S_CLKST_MASK) == 0x04U)
    {
        /* Internal reference clock is selected */
        Divider     = (uint16_t)(0x01LU << ((MCG->SC & MCG_SC_FCRDIV_MASK) >> MCG_SC_FCRDIV_SHIFT));
        MCGOUTClock = (uint32_t)(CPU_INT_SLOW_CLK_HZ / Divider); /* Slow internal reference clock 8MHz selected */
    }
    else if ((MCG->S & MCG_S_CLKST_MASK) == 0x08U)
    {
        /* External reference clock is selected */
        MCGOUTClock = CPU_XTAL_CLK_HZ;
    }
    else
    {
        /* Reserved value */
        return;
    } /* (!((MCG->S & MCG_S_CLKST_MASK) == 0x08U)) */
    SystemCoreClock =
        (MCGOUTClock / (0x01U + ((SIM->CLKDIV1 & SIM_CLKDIV1_OUTDIV1_MASK) >> SIM_CLKDIV1_OUTDIV1_SHIFT)));
}

/* ----------------------------------------------------------------------------
   -- SystemInitHook()
   ---------------------------------------------------------------------------- */

__attribute__((weak)) void SystemInitHook(void)
{
    /* Void implementation of the weak function. */
}