/* * Copyright 2019 NXP * * SPDX-License-Identifier: BSD-3-Clause */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Pins v7.0 processor: MKM35Z512xxx7 package_id: MKM35Z512VLQ7 mcu_data: ksdk2_0 processor_version: 0.0.1 board: TWR-KM35Z75M pin_labels: - {pin_num: '113', pin_signal: LCD_P10/PTG3/SPI0_SCK/I2C0_SCL, label: 'J32[B7]/J12[1]/U4[6]/SPI0_SCK', identifier: FLASH_CLK} - {pin_num: '112', pin_signal: LCD_P9/ADC0_SE11/PTG2/LLWU_P1/SPI0_PCS0, label: 'J32[B9]/J9[2]/U4[1]/SPI0_PCS0', identifier: FLASH_CS} - {pin_num: '114', pin_signal: LCD_P11/PTG4/SPI0_MOSI/I2C0_SDA, label: 'J32[B10]/J15[1]/U4[5]/SPI0_MOSI', identifier: FLASH_SI} - {pin_num: '115', pin_signal: LCD_P12/PTG5/SPI0_MISO/LPTMR0_ALT2, label: 'J32[B11]/J13[2]/U4[2]/SPI0_MISO', identifier: FLASH_SO} - {pin_num: '125', pin_signal: PTH7/UART1_RTS_b/SPI1_SCK/XBAR_OUT7, label: 'J32[B21]'} - {pin_num: '130', pin_signal: LCD_P21/PTI2/LLWU_P22/LPUART0_RX, label: 'J32[B23]'} - {pin_num: '91', pin_signal: PTE5/LLWU_P6/QTMR0_TMR3/UART2_RTS_b/EWM_OUT_b, label: 'J32[B35]'} - {pin_num: '102', pin_signal: LCD_P4/PTF5/SPI1_MISO/I2C1_SCL, label: 'J32[B44]/J23[9]/J25[14]/SPI1_MISO'} - {pin_num: '103', pin_signal: LCD_P5/PTF6/LLWU_P3/SPI1_MOSI/I2C1_SDA, label: 'J32[B45]/J23[10]/J25[13]/SPI1_MOSI'} - {pin_num: '100', pin_signal: LCD_P2/PTF3/LLWU_P20/SPI1_PCS0/LPTMR0_ALT2/UART0_RX, label: 'J32[B46]/J23[11]/J25[16]/SPI1_PCS0'} - {pin_num: '101', pin_signal: LCD_P3/PTF4/SPI1_SCK/LPTMR0_ALT1/UART0_TX, label: 'J32[B48]/J23[12]/J25[15]/SPI1_SCK'} - {pin_num: '118', pin_signal: LCD_P15/PTH0/LPUART0_CTS_b, label: 'J32[B55]/J32[B56]'} - {pin_num: '119', pin_signal: LCD_P16/PTH1/LPUART0_RTS_b, label: 'J32[B57]/J32[B58]'} - {pin_num: '120', pin_signal: LCD_P17/PTH2/LPUART0_RX, label: 'J32[B59]/J32[B60]'} - {pin_num: '121', pin_signal: LCD_P18/PTH3/LPUART0_TX, label: 'J32[B61]/J32[B62]'} - {pin_num: '79', pin_signal: CMP0_IN4/PTD7/LLWU_P7/I2C0_SCL/XBAR_IN4/UART3_RX, label: 'J32[A7]/J10[1]/U5[4]/I2C0_SCL', identifier: ACCEL_SCL} - {pin_num: '80', pin_signal: PTE0/I2C0_SDA/XBAR_OUT4/UART3_TX/CLKOUT, label: 'J32[A8]/J11[1]/U5[6]/I2C0_SDA', identifier: ACCEL_SDA} - {pin_num: '124', pin_signal: PTH6/UART1_CTS_b/SPI1_PCS0/XBAR_IN7, label: 'J32[A9]'} - {pin_num: '90', pin_signal: PTE4/LPTMR0_ALT1/UART2_CTS_b/EWM_IN, label: 'J32[A35]'} - {pin_num: '126', pin_signal: CMP0_IN5/PTI0/LLWU_P21/UART1_RX/XBAR_IN8/SPI1_MISO/SPI1_MOSI, label: 'J32[A43]'} - {pin_num: '127', pin_signal: PTI1/UART1_TX/XBAR_OUT8/SPI1_MOSI/SPI1_MISO, label: 'J32[A44]'} - {pin_num: '65', pin_signal: CMP0_IN1/PTD2/LLWU_P10/UART1_RX/SPI0_SCK/XBAR_IN3, label: 'J32[A63]'} - {pin_num: '83', pin_signal: PTE1/RESET_b, label: 'J28[2]/J22[20]/J24[10]', identifier: RESET} - {pin_num: '7', pin_signal: LCD_P47/PTI7/UART2_TX, label: UART2_TX, identifier: DEBUG_UART_TX} - {pin_num: '6', pin_signal: LCD_P46/PTI6/UART2_RX, label: UART2_RX, identifier: DEBUG_UART_RX} - {pin_num: '66', pin_signal: PTJ5/LPUART0_TX, label: 'J14[1]/U5[11]/INT1', identifier: ACCEL_INT1} - {pin_num: '67', pin_signal: PTJ6/LLWU_P18/LPUART0_RX, label: 'J16[1]/U5[9]/INT2', identifier: ACCEL_INT2} - {pin_num: '62', pin_signal: PTJ3/LPUART0_RTS_b/CMP2_OUT, label: D3/GRN, identifier: LED_GREEN} - {pin_num: '63', pin_signal: PTJ4/LPUART0_CTS_b/LPTMR1_ALT1, label: D4/RED, identifier: LED_RED} - {pin_num: '61', pin_signal: CMP0_IN0/PTD0/LLWU_P11/UART0_RX/XBAR_IN2, label: 'J17[2]/J19[1]/J25[17]/D5/ORANGE/IRDRJ/CMP0_IN0', identifier: LED_ORANGE;IR_RX} - {pin_num: '26', pin_signal: LCD_P38/PTB7/AFE_CLK, label: 'DS1[1]/LCD_P38', identifier: LCD_P38} - {pin_num: '24', pin_signal: LCD_P36/PTB5/SPI2_MOSI, label: 'DS1[2]/LCD_P36', identifier: LCD_P36} - {pin_num: '22', pin_signal: LCD_P34/PTB3/SPI2_SCK, label: 'DS1[3]/LCD_P34', identifier: LCD_P34} - {pin_num: '20', pin_signal: LCD_P32/PTB1/LLWU_P17, label: 'DS1[4]/LCD_P32', identifier: LCD_P32} - {pin_num: '16', pin_signal: LCD_P31/PTB0, label: 'DS1[5]/LCD_P31', identifier: LCD_P31} - {pin_num: '12', pin_signal: LCD_P29/PTA6/LLWU_P14/XBAR_IN0, label: 'DS1[6]/LCD_P29', identifier: LCD_P29} - {pin_num: '8', pin_signal: LCD_P25/PTA2, label: 'DS1[7]/LCD_P25', identifier: LCD_P25} - {pin_num: '4', pin_signal: LCD_P23/PTA0/LLWU_P16, label: 'DS1[8]/LCD_P23', identifier: LCD_P23} - {pin_num: '31', pin_signal: LCD_P43/PTC4, label: 'DS1[9]/LCD_P43', identifier: LCD_P43} - {pin_num: '25', pin_signal: LCD_P37/CMP1_IN0/PTB6, label: 'DS1[10]/LCD_P37', identifier: LCD_P37} - {pin_num: '23', pin_signal: LCD_P35/PTB4/SPI2_MISO, label: 'DS1[11]/LCD_P35', identifier: LCD_P35} - {pin_num: '21', pin_signal: LCD_P33/PTB2/SPI2_PCS0, label: 'DS1[12]/LCD_P33', identifier: LCD_P33} - {pin_num: '17', pin_signal: LCD_P50/PTJ2, label: 'DS1[13]/LCD_P50', identifier: LCD_P50} - {pin_num: '13', pin_signal: LCD_P30/PTA7/XBAR_OUT0, label: 'DS1[14]/LCD_P30', identifier: LCD_P30} - {pin_num: '117', pin_signal: LCD_P14/PTG7/LPTMR1_ALT1, label: 'DS1[28]/LCD_P14', identifier: LCD_P14} - {pin_num: '123', pin_signal: LCD_P20/PTH5/LPTMR1_ALT3, label: 'DS1[27]/LCD_P20', identifier: LCD_P20} - {pin_num: '131', pin_signal: LCD_P22/PTI3/LPUART0_TX/CMP2_OUT, label: 'DS1[26]/LCD_P22', identifier: LCD_P22} - {pin_num: '139', pin_signal: LCD_P56/PTL3/EWM_IN, label: 'DS1[25]/LCD_P56', identifier: LCD_P56} - {pin_num: '141', pin_signal: LCD_P58/PTL5/LLWU_P23, label: 'DS1[24]/LCD_P58', identifier: LCD_P58} - {pin_num: '116', pin_signal: LCD_P13/PTG6/LLWU_P0/LPTMR0_ALT3, label: 'DS1[23]/LCD_P13', identifier: LCD_P13} - {pin_num: '122', pin_signal: LCD_P19/PTH4/LPTMR1_ALT2, label: 'DS1[22]/LCD_P19', identifier: LCD_P19} - {pin_num: '140', pin_signal: LCD_P57/PTL4/EWM_OUT_b, label: 'DS1[21]/LCD_P57', identifier: LCD_P57} - {pin_num: '142', pin_signal: LCD_P59/PTL6, label: 'DS1[20]/LCD_P59', identifier: LCD_P59} - {pin_num: '143', pin_signal: LCD_P44/PTI4, label: 'DS1[19]/LCD_P44', identifier: LCD_P44} - {pin_num: '11', pin_signal: LCD_P28/PTA5/CMP0_OUT, label: 'DS1[18]/LCD_P28', identifier: LCD_P28} - {pin_num: '9', pin_signal: LCD_P26/PTA3, label: 'DS1[17]/LCD_P26', identifier: LCD_P26} - {pin_num: '5', pin_signal: LCD_P24/PTA1, label: 'DS1[16]/LCD_P24', identifier: LCD_P24} - {pin_num: '3', pin_signal: LCD_P45/PTI5, label: 'DS1[15]/LCD_P45', identifier: LCD_P45} - {pin_num: '10', pin_signal: LCD_P27/PTA4/LLWU_P15/NMI_b, label: SW1, identifier: SW1} - {pin_num: '64', pin_signal: PTD1/UART1_TX/SPI0_PCS0/XBAR_OUT3/QTMR0_TMR3, label: SW2, identifier: SW2} - {pin_num: '129', pin_signal: LCD_P55/PTL2/XBAR_OUT10, label: 'J18[1]/J25[23]/IRDTJ/XBAR0_OUT10', identifier: IR_TX} - {pin_num: '95', pin_signal: LCD_P0/ADC0_SE8/CMP2_IN4/PTF1/QTMR0_TMR0/XBAR_OUT6, label: 'J21[1]/POT_5K', identifier: ADC_POT} - {pin_num: '96', pin_signal: LCD_P1/ADC0_SE9/CMP2_IN5/PTF2/CMP1_OUT/RTC_CLKOUT, label: 'J20[1]/TEMP_SENSE', identifier: ADC_TEMP} - {pin_num: '84', pin_signal: EXTAL/PTE2/EWM_IN/XBAR_IN6/I2C1_SDA, label: 'J4[2]/Y2[3]/EXTAL_8MHz', identifier: EXTAL0} - {pin_num: '85', pin_signal: XTAL/PTE3/EWM_OUT_b/AFE_CLK/I2C1_SCL, label: 'J7[2]/Y2[1]/XTAL_8MHz', identifier: XTAL0} - {pin_num: '34', pin_signal: EXTAL32, label: 'Y1[2]/EXTAL_32K', identifier: EXTAL_32K} - {pin_num: '33', pin_signal: XTAL32, label: 'Y1[1]/XTAL_32K', identifier: XTAL_32K} - {pin_num: '70', pin_signal: ADC0_SE12/PTK0/LPTMR1_ALT3, label: 'J22[12]/TWRPI-ADC2'} - {pin_num: '75', pin_signal: ADC0_SE13/PTK1, label: 'J22[8]/TWRPI-ADC0'} - {pin_num: '78', pin_signal: ADC0_SE5a/PTD6/LLWU_P8/LPTMR0_ALT2/CMP1_OUT/UART3_RTS_b, label: 'J22[18]/TWRPI-ID1'} - {pin_num: '77', pin_signal: ADC0_SE4a/PTD5/LPTMR0_ALT3/QTMR0_TMR0/UART3_CTS_b, label: 'J22[17]/TWRPI-ID0'} - {pin_num: '76', pin_signal: ADC0_SE3/PTD4/LLWU_P9/UART1_RTS_b/SPI0_MISO/LPTMR1_ALT3, label: 'J22[9]/TWRPI-ADC1'} - {pin_num: '15', pin_signal: LCD_P49/PTJ1/I2C1_SCL, label: 'J23[3]/I2C1_SCL'} - {pin_num: '14', pin_signal: LCD_P48/PTJ0/I2C1_SDA, label: 'J23[4]/I2C1_SDA'} - {pin_num: '68', pin_signal: PTJ7/LPTMR1_ALT2, label: 'J23[15]'} - {pin_num: '30', pin_signal: LCD_P42/CMP0_IN3/PTC3/LLWU_P13/UART3_RX, label: 'J23[17]/UART3_RX'} - {pin_num: '28', pin_signal: LCD_P40/CMP1_IN1/PTC1/UART3_CTS_b, label: 'J23[19]/UART3_CTS'} - {pin_num: '69', pin_signal: PTD3/UART1_CTS_b/SPI0_MOSI/LPTMR1_ALT2, label: 'J23[16]'} - {pin_num: '29', pin_signal: LCD_P41/PTC2/UART3_TX/XBAR_OUT1, label: 'J23[18]/UART3_TX'} - {pin_num: '27', pin_signal: LCD_P39/PTC0/UART3_RTS_b/XBAR_IN1/PDB0_EXTRG, label: 'J23[20]/UART3_RTS'} - {pin_num: '99', pin_signal: PTK6/UART1_TX, label: 'J25[9]/UART1_TX'} - {pin_num: '106', pin_signal: LCD_P53/PTL0/I2C0_SDA, label: 'J25[11]/I2C0_SDA'} - {pin_num: '128', pin_signal: LCD_P54/PTL1/XBAR_IN10, label: 'J25[19]/XBAR0_IN10'} - {pin_num: '97', pin_signal: LCD_P51/PTK4/XBAR_IN9/AFE_CLK, label: 'J25[21]/AFE_CLK'} - {pin_num: '42', pin_signal: TAMPER0, label: 'J25[2]'} - {pin_num: '41', pin_signal: TAMPER1, label: 'J25[4]'} - {pin_num: '40', pin_signal: TAMPER2, label: 'J25[6]'} - {pin_num: '98', pin_signal: PTK5/UART1_RX, label: 'J25[8]/UART1_RX'} - {pin_num: '105', pin_signal: LCD_P52/PTK7/I2C0_SCL/XBAR_OUT9, label: 'J25[12]/I2C0_SCL'} - {pin_num: '104', pin_signal: LCD_P6/PTF7/QTMR0_TMR2/CLKOUT/CMP2_OUT, label: 'J25[18]/CLKOUT'} - {pin_num: '110', pin_signal: LCD_P7/PTG0/QTMR0_TMR1/LPTMR0_ALT3, label: 'J25[20]/QTMR0_TMR1'} - {pin_num: '81', pin_signal: ADC0_SE14/PTK2/UART0_TX, label: 'J25[22]/UART0_TX'} - {pin_num: '82', pin_signal: ADC0_SE15/PTK3/LLWU_P19/UART0_RX, label: 'J25[24]/UART0_RX'} - {pin_num: '92', pin_signal: CMP0_IN2/PTE6/LLWU_P5/XBAR_IN5/UART2_RX/I2C0_SCL/SWD_DIO, label: 'J24[2]/SWD_DIO_TGTMCU'} - {pin_num: '93', pin_signal: ADC0_SE6a/PTE7/XBAR_OUT5/UART2_TX/I2C0_SDA/SWD_CLK, label: 'J24[4]/SWD_CLK_TGTMCU'} - {pin_num: '53', pin_signal: VREF, label: 'J2[2]/VREF'} - {pin_num: '50', pin_signal: VREFL, label: VREFL} - {pin_num: '49', pin_signal: VREFH, label: VREFH} - {pin_num: '88', pin_signal: VDDA, label: VDDA} - {pin_num: '87', pin_signal: VSSA, label: VSSA} - {pin_num: '133', pin_signal: VDD135, label: MCU_PWR} - {pin_num: '89', pin_signal: VDD91, label: MCU_PWR} - {pin_num: '18', pin_signal: VDD20, label: MCU_PWR} - {pin_num: '43', pin_signal: AFE_VDDA, label: VDDA_AFE} - {pin_num: '44', pin_signal: AFE_VSSA, label: VSSA_AFE} - {pin_num: '132', pin_signal: VSS134, label: GND} - {pin_num: '39', pin_signal: VSS41, label: GND} - {pin_num: '86', pin_signal: VSS88, label: GND} - {pin_num: '19', pin_signal: VSS21, label: GND} - {pin_num: '1', pin_signal: NC3, label: GND} - {pin_num: '2', pin_signal: NC4, label: GND} - {pin_num: '35', pin_signal: NC37, label: GND} - {pin_num: '36', pin_signal: NC38, label: GND} - {pin_num: '38', pin_signal: NC40, label: GND} - {pin_num: '37', pin_signal: NC39, label: GND} - {pin_num: '56', pin_signal: NC58, label: GND} - {pin_num: '57', pin_signal: NC59, label: GND} - {pin_num: '71', pin_signal: NC73, label: GND} - {pin_num: '72', pin_signal: NC74, label: GND} - {pin_num: '73', pin_signal: NC75, label: GND} - {pin_num: '74', pin_signal: NC76, label: GND} - {pin_num: '107', pin_signal: NC109, label: GND} - {pin_num: '108', pin_signal: NC110, label: GND} - {pin_num: '109', pin_signal: NC111, label: GND} - {pin_num: '144', pin_signal: NC2, label: GND} - {pin_num: '45', pin_signal: AFE_SDADP0, label: 'J31[2]/AFE_SDADP0'} - {pin_num: '46', pin_signal: AFE_SDADM0, label: 'J31[4]/AFE_SDADM0'} - {pin_num: '47', pin_signal: AFE_SDADP1, label: 'J31[6]/AFE_SDADP1'} - {pin_num: '48', pin_signal: AFE_SDADM1, label: 'J31[8]/AFE_SDADM1'} - {pin_num: '52', pin_signal: AFE_SDADM2/CMP1_IN3, label: 'J31[12]/AFE_SDADM2'} - {pin_num: '55', pin_signal: AFE_SDADM3/CMP1_IN5, label: 'J31[16]/AFE_SDADM3'} - {pin_num: '51', pin_signal: AFE_SDADP2/CMP1_IN2, label: 'J31[10]/AFE_SDADP2'} - {pin_num: '54', pin_signal: AFE_SDADP3/CMP1_IN4, label: 'J31[14]/AFE_SDADP3'} - {pin_num: '58', pin_signal: ADC0_SE0/CMP2_IN0/PTC5/LLWU_P12/UART0_RTS_b/LPTMR1_ALT1, label: 'J31[18]/ADC0_SE0'} - {pin_num: '59', pin_signal: ADC0_SE1/CMP2_IN1/PTC6/UART0_CTS_b/QTMR0_TMR1/PDB0_EXTRG, label: 'J31[20]/ADC0_SE1'} - {pin_num: '60', pin_signal: ADC0_SE2/CMP2_IN2/PTC7/UART0_TX/XBAR_OUT2, label: 'J31[22]/ADC0_SE2'} - {pin_num: '32', pin_signal: VBAT, label: 'J1[2]/VBAT'} - {pin_num: '94', pin_signal: ADC0_SE7a/CMP2_IN3/PTF0/LLWU_P4/RTC_CLKOUT/QTMR0_TMR2/CMP0_OUT, label: NC} - {pin_num: '111', pin_signal: LCD_P8/ADC0_SE10/PTG1/LLWU_P2/LPTMR0_ALT1, label: NC} - {pin_num: '134', pin_signal: VLL3, label: 'J33[2]/VLL3'} - {pin_num: '136', pin_signal: VLL1/LCD_P61/PTM1, label: VLL1} - {pin_num: '135', pin_signal: VLL2/LCD_P60/PTM0, label: VLL2} - {pin_num: '137', pin_signal: VCAP2/LCD_P62/PTM2, label: C83/VCAP2} - {pin_num: '138', pin_signal: VCAP1/LCD_P63/PTM3, label: C83/VCAP1} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ #include "fsl_common.h" #include "fsl_port.h" #include "fsl_gpio.h" #include "fsl_xbar.h" #include "pin_mux.h" /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitBootPins * Description : Calls initialization functions. * * END ****************************************************************************************************************/ void BOARD_InitBootPins(void) { BOARD_InitPins(); BOARD_InitDEBUG_UARTPins(); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPins: - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: [] * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitPins(void) { } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitButtonsPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '10', peripheral: GPIOA, signal: 'GPIO, 4', pin_signal: LCD_P27/PTA4/LLWU_P15/NMI_b, direction: INPUT, slew_rate: slow, open_drain: disable, pull_select: up, pull_enable: enable} - {pin_num: '64', peripheral: GPIOD, signal: 'GPIO, 1', pin_signal: PTD1/UART1_TX/SPI0_PCS0/XBAR_OUT3/QTMR0_TMR3, direction: INPUT, slew_rate: slow, open_drain: disable, pull_select: up, pull_enable: enable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitButtonsPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitButtonsPins(void) { /* PCTLA Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortA); /* PCTLD Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortD); gpio_pin_config_t SW1_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTA4 (pin 10) */ GPIO_PinInit(BOARD_SW1_GPIO, BOARD_SW1_PIN, &SW1_config); gpio_pin_config_t SW2_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTD1 (pin 64) */ GPIO_PinInit(BOARD_SW2_GPIO, BOARD_SW2_PIN, &SW2_config); const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Slow slew rate is configured */ kPORT_SlowSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as PTA4 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA4 (pin 10) is configured as PTA4 */ PORT_SetPinConfig(BOARD_SW1_PORT, BOARD_SW1_PIN, &SW1); const port_pin_config_t SW2 = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Slow slew rate is configured */ kPORT_SlowSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as PTD1 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD1 (pin 64) is configured as PTD1 */ PORT_SetPinConfig(BOARD_SW2_PORT, BOARD_SW2_PIN, &SW2); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitLEDsPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '62', peripheral: GPIOJ, signal: 'GPIO, 3', pin_signal: PTJ3/LPUART0_RTS_b/CMP2_OUT, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '63', peripheral: GPIOJ, signal: 'GPIO, 4', pin_signal: PTJ4/LPUART0_CTS_b/LPTMR1_ALT1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '61', peripheral: GPIOD, signal: 'GPIO, 0', pin_signal: CMP0_IN0/PTD0/LLWU_P11/UART0_RX/XBAR_IN2, identifier: LED_ORANGE, direction: OUTPUT, gpio_init_state: 'true', slew_rate: slow, open_drain: disable, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitLEDsPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitLEDsPins(void) { /* PCTLD Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortD); /* PCTLJ Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortJ); gpio_pin_config_t LED_ORANGE_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTD0 (pin 61) */ GPIO_PinInit(BOARD_LED_ORANGE_GPIO, BOARD_LED_ORANGE_PIN, &LED_ORANGE_config); gpio_pin_config_t LED_GREEN_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTJ3 (pin 62) */ GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_PIN, &LED_GREEN_config); gpio_pin_config_t LED_RED_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTJ4 (pin 63) */ GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_PIN, &LED_RED_config); const port_pin_config_t LED_ORANGE = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Slow slew rate is configured */ kPORT_SlowSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as PTD0 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD0 (pin 61) is configured as PTD0 */ PORT_SetPinConfig(BOARD_LED_ORANGE_PORT, BOARD_LED_ORANGE_PIN, &LED_ORANGE); const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Slow slew rate is configured */ kPORT_SlowSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as PTJ3 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTJ3 (pin 62) is configured as PTJ3 */ PORT_SetPinConfig(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, &LED_GREEN); const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Slow slew rate is configured */ kPORT_SlowSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as PTJ4 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTJ4 (pin 63) is configured as PTJ4 */ PORT_SetPinConfig(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, &LED_RED); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitACCELPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '80', peripheral: I2C0, signal: SDA, pin_signal: PTE0/I2C0_SDA/XBAR_OUT4/UART3_TX/CLKOUT, slew_rate: fast, open_drain: enable, pull_select: down, pull_enable: disable, digital_filter: disable} - {pin_num: '79', peripheral: I2C0, signal: SCL, pin_signal: CMP0_IN4/PTD7/LLWU_P7/I2C0_SCL/XBAR_IN4/UART3_RX, slew_rate: fast, open_drain: enable, pull_select: down, pull_enable: disable} - {pin_num: '66', peripheral: GPIOJ, signal: 'GPIO, 5', pin_signal: PTJ5/LPUART0_TX, direction: INPUT, slew_rate: fast, open_drain: enable, pull_select: up, pull_enable: enable} - {pin_num: '67', peripheral: GPIOJ, signal: 'GPIO, 6', pin_signal: PTJ6/LLWU_P18/LPUART0_RX, direction: INPUT, slew_rate: fast, open_drain: enable, pull_select: up, pull_enable: enable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitACCELPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitACCELPins(void) { /* PCTLD Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortD); /* PCTLE Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortE); /* PCTLJ Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortJ); gpio_pin_config_t ACCEL_INT1_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTJ5 (pin 66) */ GPIO_PinInit(BOARD_ACCEL_INT1_GPIO, BOARD_ACCEL_INT1_PIN, &ACCEL_INT1_config); gpio_pin_config_t ACCEL_INT2_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTJ6 (pin 67) */ GPIO_PinInit(BOARD_ACCEL_INT2_GPIO, BOARD_ACCEL_INT2_PIN, &ACCEL_INT2_config); const port_pin_config_t ACCEL_SCL = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is enabled */ kPORT_OpenDrainEnable, /* Pin is configured as I2C0_SCL */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD7 (pin 79) is configured as I2C0_SCL */ PORT_SetPinConfig(BOARD_ACCEL_SCL_PORT, BOARD_ACCEL_SCL_PIN, &ACCEL_SCL); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port E */ PORTE, /* Digital filter is configured for PORTE0 */ PORT_DFER_DFE_0_MASK, /* Disable digital filter */ false); const port_pin_config_t ACCEL_SDA = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is enabled */ kPORT_OpenDrainEnable, /* Pin is configured as I2C0_SDA */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTE0 (pin 80) is configured as I2C0_SDA */ PORT_SetPinConfig(BOARD_ACCEL_SDA_PORT, BOARD_ACCEL_SDA_PIN, &ACCEL_SDA); const port_pin_config_t ACCEL_INT1 = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is enabled */ kPORT_OpenDrainEnable, /* Pin is configured as PTJ5 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTJ5 (pin 66) is configured as PTJ5 */ PORT_SetPinConfig(BOARD_ACCEL_INT1_PORT, BOARD_ACCEL_INT1_PIN, &ACCEL_INT1); const port_pin_config_t ACCEL_INT2 = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is enabled */ kPORT_OpenDrainEnable, /* Pin is configured as PTJ6 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTJ6 (pin 67) is configured as PTJ6 */ PORT_SetPinConfig(BOARD_ACCEL_INT2_PORT, BOARD_ACCEL_INT2_PIN, &ACCEL_INT2); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitDEBUG_UARTPins: - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '7', peripheral: UART2, signal: TX, pin_signal: LCD_P47/PTI7/UART2_TX, direction: OUTPUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '6', peripheral: UART2, signal: RX, pin_signal: LCD_P46/PTI6/UART2_RX, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitDEBUG_UARTPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitDEBUG_UARTPins(void) { /* PCTLI Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortI); const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as UART2_RX */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTI6 (pin 6) is configured as UART2_RX */ PORT_SetPinConfig(BOARD_DEBUG_UART_RX_PORT, BOARD_DEBUG_UART_RX_PIN, &DEBUG_UART_RX); const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as UART2_TX */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTI7 (pin 7) is configured as UART2_TX */ PORT_SetPinConfig(BOARD_DEBUG_UART_TX_PORT, BOARD_DEBUG_UART_TX_PIN, &DEBUG_UART_TX); SIM->MISC_CTL = ((SIM->MISC_CTL & /* Mask bits to zero which are setting */ (~(SIM_MISC_CTL_UART2IRSEL_MASK))) /* UART2 IrDA Select: Pad RX input PTI[6] or PTE[6] selected for RX input of UART2 and UART2 * TX signal is not used for modulation. */ | SIM_MISC_CTL_UART2IRSEL(MISC_CTL_UART2IRSEL_0b0)); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitOSCPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '85', peripheral: OSC, signal: XTAL, pin_signal: XTAL/PTE3/EWM_OUT_b/AFE_CLK/I2C1_SCL, slew_rate: no_init, open_drain: no_init, pull_select: no_init, pull_enable: no_init, digital_filter: no_init} - {pin_num: '84', peripheral: OSC, signal: EXTAL, pin_signal: EXTAL/PTE2/EWM_IN/XBAR_IN6/I2C1_SDA, slew_rate: no_init, open_drain: no_init, pull_select: no_init, pull_enable: no_init, digital_filter: no_init} - {pin_num: '33', peripheral: RTC, signal: XTAL32, pin_signal: XTAL32} - {pin_num: '34', peripheral: RTC, signal: EXTAL32, pin_signal: EXTAL32} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitOSCPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitOSCPins(void) { /* PCTLE Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortE); /* PORTE2 (pin 84) is configured as EXTAL */ PORT_SetPinMux(BOARD_EXTAL0_PORT, BOARD_EXTAL0_PIN, kPORT_PinDisabledOrAnalog); /* PORTE3 (pin 85) is configured as XTAL */ PORT_SetPinMux(BOARD_XTAL0_PORT, BOARD_XTAL0_PIN, kPORT_PinDisabledOrAnalog); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitSPI_FLASHPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '114', peripheral: SPI0, signal: MOSI, pin_signal: LCD_P11/PTG4/SPI0_MOSI/I2C0_SDA, direction: OUTPUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '115', peripheral: SPI0, signal: MISO, pin_signal: LCD_P12/PTG5/SPI0_MISO/LPTMR0_ALT2, direction: INPUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '113', peripheral: SPI0, signal: SCK, pin_signal: LCD_P10/PTG3/SPI0_SCK/I2C0_SCL, direction: OUTPUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '112', peripheral: SPI0, signal: PCS0, pin_signal: LCD_P9/ADC0_SE11/PTG2/LLWU_P1/SPI0_PCS0, direction: OUTPUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitSPI_FLASHPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitSPI_FLASHPins(void) { /* PCTLG Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortG); const port_pin_config_t FLASH_CS = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as SPI0_PCS0 */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG2 (pin 112) is configured as SPI0_PCS0 */ PORT_SetPinConfig(BOARD_FLASH_CS_PORT, BOARD_FLASH_CS_PIN, &FLASH_CS); const port_pin_config_t FLASH_CLK = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as SPI0_SCK */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG3 (pin 113) is configured as SPI0_SCK */ PORT_SetPinConfig(BOARD_FLASH_CLK_PORT, BOARD_FLASH_CLK_PIN, &FLASH_CLK); const port_pin_config_t FLASH_SI = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as SPI0_MOSI */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG4 (pin 114) is configured as SPI0_MOSI */ PORT_SetPinConfig(BOARD_FLASH_SI_PORT, BOARD_FLASH_SI_PIN, &FLASH_SI); const port_pin_config_t FLASH_SO = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as SPI0_MISO */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG5 (pin 115) is configured as SPI0_MISO */ PORT_SetPinConfig(BOARD_FLASH_SO_PORT, BOARD_FLASH_SO_PIN, &FLASH_SO); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitInfra_RedPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '129', peripheral: SIM, signal: UART_MOD_AND_OUT, pin_signal: LCD_P55/PTL2/XBAR_OUT10, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {peripheral: SIM, signal: UART_MOD_CARR, pin_signal: RTC_CLK_Output} - {peripheral: SIM, signal: UART_MOD_DATA, pin_signal: UART0_TX_output} - {pin_num: '61', peripheral: CMP0, signal: 'IN, 0', pin_signal: CMP0_IN0/PTD0/LLWU_P11/UART0_RX/XBAR_IN2, identifier: IR_RX, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {peripheral: UART0, signal: RX, pin_signal: CMP0_Output} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitInfra_RedPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitInfra_RedPins(void) { /* PCTLD Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortD); /* PCTLL Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortL); /* Peripheral Crossbar Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_Xbar); const port_pin_config_t IR_RX = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as CMP0_IN0 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD0 (pin 61) is configured as CMP0_IN0 */ PORT_SetPinConfig(BOARD_IR_RX_PORT, BOARD_IR_RX_PIN, &IR_RX); const port_pin_config_t IR_TX = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as XBAR_OUT10 */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTL2 (pin 129) is configured as XBAR_OUT10 */ PORT_SetPinConfig(BOARD_IR_TX_PORT, BOARD_IR_TX_PIN, &IR_TX); SIM->MISC_CTL = ((SIM->MISC_CTL & /* Mask bits to zero which are setting */ (~(SIM_MISC_CTL_UARTMODTYPE_MASK | SIM_MISC_CTL_UART0IRSEL_MASK))) /* UART Modulation Type: TypeB (AND'ed) Modulation selected for IrDA. */ | SIM_MISC_CTL_UARTMODTYPE(MISC_CTL_UARTMODTYPE_0b1) /* UART0 IrDA Select: UART0 selected for IrDA modulation. * UART0 TX modulated by XBAR_OUT[14] and UART0 RX input connected to XBAR_OUT[13]. * UARTxIRSEL cannot configure XBAR_OUT[14] and XBAR_OUT[13] automatically, and they need * extra configuration in XBAR. * User should configure XBAR[14:13] accordingly. */ | SIM_MISC_CTL_UART0IRSEL(MISC_CTL_UART0IRSEL_0b1)); /* UART TX Output (after modulation) output assigned to XBAR_IN14 input is connected * to XBAR_OUT34 output assigned to XBAR Output pin 10 */ XBAR_SetSignalsConnection(XBAR, kXBAR_InputUartTxOutput, kXBAR_OutputXbOut10); /* CMP0 Output output assigned to XBAR_IN11 input is connected * to XBAR_OUT13 output assigned to UART Rx IrDA Input */ XBAR_SetSignalsConnection(XBAR, kXBAR_InputCmp0Output, kXBAR_OutputUartRxInput); /* iRTC Clock Output output assigned to XBAR_IN10 input is connected * to XBAR_OUT14 output assigned to SIM UART Tx IrDA Modulator Carrier Input */ XBAR_SetSignalsConnection(XBAR, kXBAR_InputRtcClockOutput, kXBAR_OutputUartTxModCarrier); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPotentiometerPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '95', peripheral: ADC0, signal: 'SE, 8', pin_signal: LCD_P0/ADC0_SE8/CMP2_IN4/PTF1/QTMR0_TMR0/XBAR_OUT6, slew_rate: no_init, open_drain: no_init, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPotentiometerPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitPotentiometerPins(void) { /* PCTLF Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortF); /* PORTF1 (pin 95) is configured as ADC0_SE8 */ PORT_SetPinMux(BOARD_ADC_POT_PORT, BOARD_ADC_POT_PIN, kPORT_PinDisabledOrAnalog); PORTF->PCR[1] = ((PORTF->PCR[1] & /* Mask bits to zero which are setting */ (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK))) /* Pull Select: Internal pulldown resistor is enabled on the corresponding pin, if the * corresponding PE field is set. */ | PORT_PCR_PS(kPORT_PullDown) /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | PORT_PCR_PE(kPORT_PullDisable)); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitTemp_sensorPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '96', peripheral: ADC0, signal: 'SE, 9', pin_signal: LCD_P1/ADC0_SE9/CMP2_IN5/PTF2/CMP1_OUT/RTC_CLKOUT, slew_rate: no_init, open_drain: no_init, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitTemp_sensorPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitTemp_sensorPins(void) { /* PCTLF Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortF); /* PORTF2 (pin 96) is configured as ADC0_SE9 */ PORT_SetPinMux(BOARD_ADC_TEMP_PORT, BOARD_ADC_TEMP_PIN, kPORT_PinDisabledOrAnalog); PORTF->PCR[2] = ((PORTF->PCR[2] & /* Mask bits to zero which are setting */ (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_ISF_MASK))) /* Pull Select: Internal pulldown resistor is enabled on the corresponding pin, if the * corresponding PE field is set. */ | PORT_PCR_PS(kPORT_PullDown) /* Pull Enable: Internal pullup or pulldown resistor is not enabled on the corresponding pin. */ | PORT_PCR_PE(kPORT_PullDisable)); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitLCDPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '26', peripheral: LCD, signal: 'P, 38', pin_signal: LCD_P38/PTB7/AFE_CLK, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '24', peripheral: LCD, signal: 'P, 36', pin_signal: LCD_P36/PTB5/SPI2_MOSI, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '22', peripheral: LCD, signal: 'P, 34', pin_signal: LCD_P34/PTB3/SPI2_SCK, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '20', peripheral: LCD, signal: 'P, 32', pin_signal: LCD_P32/PTB1/LLWU_P17, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '16', peripheral: LCD, signal: 'P, 31', pin_signal: LCD_P31/PTB0, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '12', peripheral: LCD, signal: 'P, 29', pin_signal: LCD_P29/PTA6/LLWU_P14/XBAR_IN0, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '8', peripheral: LCD, signal: 'P, 25', pin_signal: LCD_P25/PTA2, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '4', peripheral: LCD, signal: 'P, 23', pin_signal: LCD_P23/PTA0/LLWU_P16, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '31', peripheral: LCD, signal: 'P, 43', pin_signal: LCD_P43/PTC4, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '25', peripheral: LCD, signal: 'P, 37', pin_signal: LCD_P37/CMP1_IN0/PTB6, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '23', peripheral: LCD, signal: 'P, 35', pin_signal: LCD_P35/PTB4/SPI2_MISO, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '21', peripheral: LCD, signal: 'P, 33', pin_signal: LCD_P33/PTB2/SPI2_PCS0, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '17', peripheral: LCD, signal: 'P, 50', pin_signal: LCD_P50/PTJ2, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '13', peripheral: LCD, signal: 'P, 30', pin_signal: LCD_P30/PTA7/XBAR_OUT0, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '3', peripheral: LCD, signal: 'P, 45', pin_signal: LCD_P45/PTI5, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '5', peripheral: LCD, signal: 'P, 24', pin_signal: LCD_P24/PTA1, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '9', peripheral: LCD, signal: 'P, 26', pin_signal: LCD_P26/PTA3, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '11', peripheral: LCD, signal: 'P, 28', pin_signal: LCD_P28/PTA5/CMP0_OUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '143', peripheral: LCD, signal: 'P, 44', pin_signal: LCD_P44/PTI4, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '142', peripheral: LCD, signal: 'P, 59', pin_signal: LCD_P59/PTL6, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '140', peripheral: LCD, signal: 'P, 57', pin_signal: LCD_P57/PTL4/EWM_OUT_b, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '122', peripheral: LCD, signal: 'P, 19', pin_signal: LCD_P19/PTH4/LPTMR1_ALT2, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '116', peripheral: LCD, signal: 'P, 13', pin_signal: LCD_P13/PTG6/LLWU_P0/LPTMR0_ALT3, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '141', peripheral: LCD, signal: 'P, 58', pin_signal: LCD_P58/PTL5/LLWU_P23, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '139', peripheral: LCD, signal: 'P, 56', pin_signal: LCD_P56/PTL3/EWM_IN, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '131', peripheral: LCD, signal: 'P, 22', pin_signal: LCD_P22/PTI3/LPUART0_TX/CMP2_OUT, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '123', peripheral: LCD, signal: 'P, 20', pin_signal: LCD_P20/PTH5/LPTMR1_ALT3, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} - {pin_num: '117', peripheral: LCD, signal: 'P, 14', pin_signal: LCD_P14/PTG7/LPTMR1_ALT1, slew_rate: fast, open_drain: disable, pull_select: down, pull_enable: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitLCDPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitLCDPins(void) { /* PCTLA Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortA); /* PCTLB Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortB); /* PCTLC Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortC); /* PCTLG Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortG); /* PCTLH Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortH); /* PCTLI Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortI); /* PCTLJ Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortJ); /* PCTLL Clock Gate Control: Clock enabled */ CLOCK_EnableClock(kCLOCK_PortL); const port_pin_config_t LCD_P23 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P23 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA0 (pin 4) is configured as LCD_P23 */ PORT_SetPinConfig(BOARD_LCD_P23_PORT, BOARD_LCD_P23_PIN, &LCD_P23); const port_pin_config_t LCD_P24 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P24 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA1 (pin 5) is configured as LCD_P24 */ PORT_SetPinConfig(BOARD_LCD_P24_PORT, BOARD_LCD_P24_PIN, &LCD_P24); const port_pin_config_t LCD_P25 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P25 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA2 (pin 8) is configured as LCD_P25 */ PORT_SetPinConfig(BOARD_LCD_P25_PORT, BOARD_LCD_P25_PIN, &LCD_P25); const port_pin_config_t LCD_P26 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P26 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA3 (pin 9) is configured as LCD_P26 */ PORT_SetPinConfig(BOARD_LCD_P26_PORT, BOARD_LCD_P26_PIN, &LCD_P26); const port_pin_config_t LCD_P28 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P28 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA5 (pin 11) is configured as LCD_P28 */ PORT_SetPinConfig(BOARD_LCD_P28_PORT, BOARD_LCD_P28_PIN, &LCD_P28); const port_pin_config_t LCD_P29 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P29 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA6 (pin 12) is configured as LCD_P29 */ PORT_SetPinConfig(BOARD_LCD_P29_PORT, BOARD_LCD_P29_PIN, &LCD_P29); const port_pin_config_t LCD_P30 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P30 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA7 (pin 13) is configured as LCD_P30 */ PORT_SetPinConfig(BOARD_LCD_P30_PORT, BOARD_LCD_P30_PIN, &LCD_P30); const port_pin_config_t LCD_P31 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P31 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB0 (pin 16) is configured as LCD_P31 */ PORT_SetPinConfig(BOARD_LCD_P31_PORT, BOARD_LCD_P31_PIN, &LCD_P31); const port_pin_config_t LCD_P32 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P32 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB1 (pin 20) is configured as LCD_P32 */ PORT_SetPinConfig(BOARD_LCD_P32_PORT, BOARD_LCD_P32_PIN, &LCD_P32); const port_pin_config_t LCD_P33 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P33 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB2 (pin 21) is configured as LCD_P33 */ PORT_SetPinConfig(BOARD_LCD_P33_PORT, BOARD_LCD_P33_PIN, &LCD_P33); const port_pin_config_t LCD_P34 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P34 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB3 (pin 22) is configured as LCD_P34 */ PORT_SetPinConfig(BOARD_LCD_P34_PORT, BOARD_LCD_P34_PIN, &LCD_P34); const port_pin_config_t LCD_P35 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P35 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB4 (pin 23) is configured as LCD_P35 */ PORT_SetPinConfig(BOARD_LCD_P35_PORT, BOARD_LCD_P35_PIN, &LCD_P35); const port_pin_config_t LCD_P36 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P36 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB5 (pin 24) is configured as LCD_P36 */ PORT_SetPinConfig(BOARD_LCD_P36_PORT, BOARD_LCD_P36_PIN, &LCD_P36); const port_pin_config_t LCD_P37 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P37 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB6 (pin 25) is configured as LCD_P37 */ PORT_SetPinConfig(BOARD_LCD_P37_PORT, BOARD_LCD_P37_PIN, &LCD_P37); const port_pin_config_t LCD_P38 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P38 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB7 (pin 26) is configured as LCD_P38 */ PORT_SetPinConfig(BOARD_LCD_P38_PORT, BOARD_LCD_P38_PIN, &LCD_P38); const port_pin_config_t LCD_P43 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P43 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTC4 (pin 31) is configured as LCD_P43 */ PORT_SetPinConfig(BOARD_LCD_P43_PORT, BOARD_LCD_P43_PIN, &LCD_P43); const port_pin_config_t LCD_P13 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P13 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG6 (pin 116) is configured as LCD_P13 */ PORT_SetPinConfig(BOARD_LCD_P13_PORT, BOARD_LCD_P13_PIN, &LCD_P13); const port_pin_config_t LCD_P14 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P14 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTG7 (pin 117) is configured as LCD_P14 */ PORT_SetPinConfig(BOARD_LCD_P14_PORT, BOARD_LCD_P14_PIN, &LCD_P14); const port_pin_config_t LCD_P19 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P19 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTH4 (pin 122) is configured as LCD_P19 */ PORT_SetPinConfig(BOARD_LCD_P19_PORT, BOARD_LCD_P19_PIN, &LCD_P19); const port_pin_config_t LCD_P20 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P20 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTH5 (pin 123) is configured as LCD_P20 */ PORT_SetPinConfig(BOARD_LCD_P20_PORT, BOARD_LCD_P20_PIN, &LCD_P20); const port_pin_config_t LCD_P22 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P22 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTI3 (pin 131) is configured as LCD_P22 */ PORT_SetPinConfig(BOARD_LCD_P22_PORT, BOARD_LCD_P22_PIN, &LCD_P22); const port_pin_config_t LCD_P44 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P44 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTI4 (pin 143) is configured as LCD_P44 */ PORT_SetPinConfig(BOARD_LCD_P44_PORT, BOARD_LCD_P44_PIN, &LCD_P44); const port_pin_config_t LCD_P45 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P45 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTI5 (pin 3) is configured as LCD_P45 */ PORT_SetPinConfig(BOARD_LCD_P45_PORT, BOARD_LCD_P45_PIN, &LCD_P45); const port_pin_config_t LCD_P50 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P50 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTJ2 (pin 17) is configured as LCD_P50 */ PORT_SetPinConfig(BOARD_LCD_P50_PORT, BOARD_LCD_P50_PIN, &LCD_P50); const port_pin_config_t LCD_P56 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P56 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTL3 (pin 139) is configured as LCD_P56 */ PORT_SetPinConfig(BOARD_LCD_P56_PORT, BOARD_LCD_P56_PIN, &LCD_P56); const port_pin_config_t LCD_P57 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P57 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTL4 (pin 140) is configured as LCD_P57 */ PORT_SetPinConfig(BOARD_LCD_P57_PORT, BOARD_LCD_P57_PIN, &LCD_P57); const port_pin_config_t LCD_P58 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P58 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTL5 (pin 141) is configured as LCD_P58 */ PORT_SetPinConfig(BOARD_LCD_P58_PORT, BOARD_LCD_P58_PIN, &LCD_P58); const port_pin_config_t LCD_P59 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Fast slew rate is configured */ kPORT_FastSlewRate, /* Open drain is disabled */ kPORT_OpenDrainDisable, /* Pin is configured as LCD_P59 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTL6 (pin 142) is configured as LCD_P59 */ PORT_SetPinConfig(BOARD_LCD_P59_PORT, BOARD_LCD_P59_PIN, &LCD_P59); } /*********************************************************************************************************************** * EOF **********************************************************************************************************************/