/*
 * Copyright 2018 NXP.
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

/***********************************************************************************************************************
 * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
 * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
 **********************************************************************************************************************/

#ifndef _PIN_MUX_H_
#define _PIN_MUX_H_

/***********************************************************************************************************************
 * Definitions
 **********************************************************************************************************************/

/*! @brief Direction type  */
typedef enum _pin_mux_direction
{
    kPIN_MUX_DirectionInput = 0U,        /* Input direction */
    kPIN_MUX_DirectionOutput = 1U,       /* Output direction */
    kPIN_MUX_DirectionInputOrOutput = 2U /* Input or output direction */
} pin_mux_direction_t;

/*!
 * @addtogroup pin_mux
 * @{
 */

/***********************************************************************************************************************
 * API
 **********************************************************************************************************************/

#if defined(__cplusplus)
extern "C" {
#endif

/*!
 * @brief Calls initialization functions.
 *
 */
void BOARD_InitBootPins(void);

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_8 (number 14), CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1
  @{ */
/*!
 * @brief Device name: GPIO */
#define BOARD_INITLEDSPINS_LED_BLUE_PERIPHERAL GPIO
/*!
 * @brief GPIO signal: PIO0 */
#define BOARD_INITLEDSPINS_LED_BLUE_SIGNAL PIO0
/*!
 * @brief GPIO device name: GPIO */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO
/*!
 * @brief PIO0 pin index: 8 */
#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 8U
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U
/*!
 * @brief 0U pin index: 8 */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN 8U
/*!
 * @brief GPIO PIO0 channel: 8 */
#define BOARD_INITLEDSPINS_LED_BLUE_CHANNEL 8
/*!
 * @brief Pin name */
#define BOARD_INITLEDSPINS_LED_BLUE_PIN_NAME PIO0_8
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_BLUE_LABEL "CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1"
/*!
 * @brief Identifier name */
#define BOARD_INITLEDSPINS_LED_BLUE_NAME "LED_BLUE"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_BLUE_DIRECTION kPIN_MUX_DirectionOutput
/* @} */

/*! @name PIO0_9 (number 13), CN5[8]/CN6[1]/CN3[28]/LD21/LD22/LD5/PIO0_9_TXD_GPIO1_LED2
  @{ */
/*!
 * @brief Device name: GPIO */
#define BOARD_INITLEDSPINS_LED_RED_PERIPHERAL GPIO
/*!
 * @brief GPIO signal: PIO0 */
#define BOARD_INITLEDSPINS_LED_RED_SIGNAL PIO0
/*!
 * @brief GPIO device name: GPIO */
#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO
/*!
 * @brief PIO0 pin index: 9 */
#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 9U
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITLEDSPINS_LED_RED_PORT 0U
/*!
 * @brief 0U pin index: 9 */
#define BOARD_INITLEDSPINS_LED_RED_PIN 9U
/*!
 * @brief GPIO PIO0 channel: 9 */
#define BOARD_INITLEDSPINS_LED_RED_CHANNEL 9
/*!
 * @brief Pin name */
#define BOARD_INITLEDSPINS_LED_RED_PIN_NAME PIO0_9
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_RED_LABEL "CN5[8]/CN6[1]/CN3[28]/LD21/LD22/LD5/PIO0_9_TXD_GPIO1_LED2"
/*!
 * @brief Identifier name */
#define BOARD_INITLEDSPINS_LED_RED_NAME "LED_RED"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_RED_DIRECTION kPIN_MUX_DirectionOutput
/* @} */

/*! @name PIO0_12 (number 4), CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3
  @{ */
/*!
 * @brief Device name: GPIO */
#define BOARD_INITLEDSPINS_LED_GREEN_PERIPHERAL GPIO
/*!
 * @brief GPIO signal: PIO0 */
#define BOARD_INITLEDSPINS_LED_GREEN_SIGNAL PIO0
/*!
 * @brief GPIO device name: GPIO */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO
/*!
 * @brief PIO0 pin index: 12 */
#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 12U
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U
/*!
 * @brief 0U pin index: 12 */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN 12U
/*!
 * @brief GPIO PIO0 channel: 12 */
#define BOARD_INITLEDSPINS_LED_GREEN_CHANNEL 12
/*!
 * @brief Pin name */
#define BOARD_INITLEDSPINS_LED_GREEN_PIN_NAME PIO0_12
/*!
 * @brief Label */
#define BOARD_INITLEDSPINS_LED_GREEN_LABEL "CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3"
/*!
 * @brief Identifier name */
#define BOARD_INITLEDSPINS_LED_GREEN_NAME "LED_GREEN"
/*!
 * @brief Direction */
#define BOARD_INITLEDSPINS_LED_GREEN_DIRECTION kPIN_MUX_DirectionOutput
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_4 (number 6), CN4[6]/CN3[32]/PIO0_4_TXD_SCK
  @{ */
/*!
 * @brief Device name: USART0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PERIPHERAL USART0
/*!
 * @brief USART0 signal: TXD */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_SIGNAL TXD
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
/*!
 * @brief 0U pin index: 4 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 4U
/*!
 * @brief Pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_NAME PIO0_4
/*!
 * @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_LABEL "CN4[6]/CN3[32]/PIO0_4_TXD_SCK"
/*!
 * @brief Identifier name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_NAME "DEBUG_UART_TX"
/* @} */

/*! @name PIO0_0 (number 19), CN5[2]/CN3[31]/PIO0_0_RXD
  @{ */
/*!
 * @brief Device name: USART0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PERIPHERAL USART0
/*!
 * @brief USART0 signal: RXD */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_SIGNAL RXD
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
/*!
 * @brief 0U pin index: 0 */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 0U
/*!
 * @brief Pin name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_NAME PIO0_0
/*!
 * @brief Label */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_LABEL "CN5[2]/CN3[31]/PIO0_0_RXD"
/*!
 * @brief Identifier name */
#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_NAME "DEBUG_UART_RX"
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name SWCLK (number 7), CN2[4]/CN4[7]/U3[16]/PIO0_3_SWCLK
  @{ */
/*!
 * @brief Device name: SWD */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PERIPHERAL SWD
/*!
 * @brief SWD signal: SWCLK */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_SIGNAL SWCLK
/*!
 * @brief Pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_PIN_NAME SWCLK
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_LABEL "CN2[4]/CN4[7]/U3[16]/PIO0_3_SWCLK"
/*!
 * @brief Identifier name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWCLK_NAME "DEBUG_SWD_SWCLK"
/* @} */

/*! @name SWDIO (number 8), CN2[2]/CN4[8]/U3[17]/PIO0_2_SWDIO
  @{ */
/*!
 * @brief Device name: SWD */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PERIPHERAL SWD
/*!
 * @brief SWD signal: SWDIO */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_SIGNAL SWDIO
/*!
 * @brief Pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_NAME SWDIO
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_LABEL "CN2[2]/CN4[8]/U3[17]/PIO0_2_SWDIO"
/*!
 * @brief Identifier name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_NAME "DEBUG_SWD_SWDIO"
/* @} */

/*! @name RESETN (number 5), CN4[5]/CN2[10]/CN3[3]/U3[3]/U3[8]/PB2/PIO0_5_nRST
  @{ */
/*!
 * @brief Device name: SYSCON */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PERIPHERAL SYSCON
/*!
 * @brief SYSCON signal: RESETN */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_SIGNAL RESETN
/*!
 * @brief Pin name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_PIN_NAME RESETN
/*!
 * @brief Label */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_LABEL "CN4[5]/CN2[10]/CN3[3]/U3[3]/U3[8]/PB2/PIO0_5_nRST"
/*!
 * @brief Identifier name */
#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_RESETN_NAME "DEBUG_SWD_RESETN"
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_16 (number 1), CN4[1]/CN3[15]/CN7[1]/U7[2]/PIO0_16_SCL
  @{ */
/*!
 * @brief Device name: I2C0 */
#define BOARD_INITI2CPINS_I2C_SCL_PERIPHERAL I2C0
/*!
 * @brief I2C0 signal: SCL */
#define BOARD_INITI2CPINS_I2C_SCL_SIGNAL SCL
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITI2CPINS_I2C_SCL_PORT 0U
/*!
 * @brief 0U pin index: 16 */
#define BOARD_INITI2CPINS_I2C_SCL_PIN 16U
/*!
 * @brief Pin name */
#define BOARD_INITI2CPINS_I2C_SCL_PIN_NAME PIO0_16
/*!
 * @brief Label */
#define BOARD_INITI2CPINS_I2C_SCL_LABEL "CN4[1]/CN3[15]/CN7[1]/U7[2]/PIO0_16_SCL"
/*!
 * @brief Identifier name */
#define BOARD_INITI2CPINS_I2C_SCL_NAME "I2C_SCL"
/* @} */

/*! @name PIO0_10 (number 10), CN4[10]/CN3[16]/CN7[2]/U7[1]/PIO0_10_SDA
  @{ */
/*!
 * @brief Device name: I2C0 */
#define BOARD_INITI2CPINS_I2C_SDA_PERIPHERAL I2C0
/*!
 * @brief I2C0 signal: SDA */
#define BOARD_INITI2CPINS_I2C_SDA_SIGNAL SDA
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITI2CPINS_I2C_SDA_PORT 0U
/*!
 * @brief 0U pin index: 10 */
#define BOARD_INITI2CPINS_I2C_SDA_PIN 10U
/*!
 * @brief Pin name */
#define BOARD_INITI2CPINS_I2C_SDA_PIN_NAME PIO0_10
/*!
 * @brief Label */
#define BOARD_INITI2CPINS_I2C_SDA_LABEL "CN4[10]/CN3[16]/CN7[2]/U7[1]/PIO0_10_SDA"
/*!
 * @brief Identifier name */
#define BOARD_INITI2CPINS_I2C_SDA_NAME "I2C_SDA"
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitI2CPins(void); /* Function assigned for the Cortex-M0P */

#define IOCON_PIO_HYS_EN 0x20u      /*!<@brief Enable hysteresis */
#define IOCON_PIO_INV_DI 0x00u      /*!<@brief Input not invert */
#define IOCON_PIO_MODE_PULLUP 0x10u /*!<@brief Selects pull-up function */
#define IOCON_PIO_OD_DI 0x00u       /*!<@brief Disables Open-drain function */

/*! @name PIO0_8 (number 14), CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1
  @{ */
/*!
 * @brief Device name: GPIO */
#define BOARD_INITBUTTONSPINS_User_PB3_PERIPHERAL GPIO
/*!
 * @brief GPIO signal: PIO0 */
#define BOARD_INITBUTTONSPINS_User_PB3_SIGNAL PIO0
/*!
 * @brief GPIO device name: GPIO */
#define BOARD_INITBUTTONSPINS_User_PB3_GPIO GPIO
/*!
 * @brief PIO0 pin index: 8 */
#define BOARD_INITBUTTONSPINS_User_PB3_GPIO_PIN 8U
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITBUTTONSPINS_User_PB3_PORT 0U
/*!
 * @brief 0U pin index: 8 */
#define BOARD_INITBUTTONSPINS_User_PB3_PIN 8U
/*!
 * @brief GPIO PIO0 channel: 8 */
#define BOARD_INITBUTTONSPINS_User_PB3_CHANNEL 8
/*!
 * @brief Pin name */
#define BOARD_INITBUTTONSPINS_User_PB3_PIN_NAME PIO0_8
/*!
 * @brief Label */
#define BOARD_INITBUTTONSPINS_User_PB3_LABEL "CN5[7]/CN3[25]/CN6[4]/LD19/LD20/LD4/PB3/PIO0_8_RXD_User_GPIO2_LED1"
/*!
 * @brief Identifier name */
#define BOARD_INITBUTTONSPINS_User_PB3_NAME "User_PB3"
/*!
 * @brief Direction */
#define BOARD_INITBUTTONSPINS_User_PB3_DIRECTION kPIN_MUX_DirectionInput
/* @} */

/*! @name PIO0_12 (number 4), CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3
  @{ */
/*!
 * @brief Device name: GPIO */
#define BOARD_INITBUTTONSPINS_ISP_PB1_PERIPHERAL GPIO
/*!
 * @brief GPIO signal: PIO0 */
#define BOARD_INITBUTTONSPINS_ISP_PB1_SIGNAL PIO0
/*!
 * @brief GPIO device name: GPIO */
#define BOARD_INITBUTTONSPINS_ISP_PB1_GPIO GPIO
/*!
 * @brief PIO0 pin index: 12 */
#define BOARD_INITBUTTONSPINS_ISP_PB1_GPIO_PIN 12U
/*!
 * @brief PORT device name: 0U */
#define BOARD_INITBUTTONSPINS_ISP_PB1_PORT 0U
/*!
 * @brief 0U pin index: 12 */
#define BOARD_INITBUTTONSPINS_ISP_PB1_PIN 12U
/*!
 * @brief GPIO PIO0 channel: 12 */
#define BOARD_INITBUTTONSPINS_ISP_PB1_CHANNEL 12
/*!
 * @brief Pin name */
#define BOARD_INITBUTTONSPINS_ISP_PB1_PIN_NAME PIO0_12
/*!
 * @brief Label */
#define BOARD_INITBUTTONSPINS_ISP_PB1_LABEL "CN4[4]/CN3[26]/CN3[24]/CN6[3]/CN9[1]/LD23/LD24/LD6/PB1/PIO0_12_ISP_GPIO0_LED3"
/*!
 * @brief Identifier name */
#define BOARD_INITBUTTONSPINS_ISP_PB1_NAME "ISP_PB1"
/*!
 * @brief Direction */
#define BOARD_INITBUTTONSPINS_ISP_PB1_DIRECTION kPIN_MUX_DirectionInput
/* @} */

/*!
 * @brief Configures pin routing and optionally pin electrical features.
 *
 */
void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M0P */

#if defined(__cplusplus)
}
#endif

/*!
 * @}
 */
#endif /* _PIN_MUX_H_ */

/***********************************************************************************************************************
 * EOF
 **********************************************************************************************************************/
