/* * Copyright 2018 NXP. * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* !!GlobalInfo product: Pins v4.1 processor: MKE15Z256xxx7 package_id: MKE15Z256VLL7 mcu_data: ksdk2_0 processor_version: 4.0.0 board: FRDM-KE15Z pin_labels: - {pin_num: '1', pin_signal: PTE16/FXIO_D3/TRGMUX_OUT7, label: 'J21[8]/FLEXIO_3'} - {pin_num: '2', pin_signal: PTE15/FXIO_D2/TRGMUX_OUT6, label: 'J21[7]/FLEXIO_2'} - {pin_num: '3', pin_signal: TSI0_CH5/PTD1/FTM0_CH3/LPSPI1_SIN/FTM2_CH1/FXIO_D1/TRGMUX_OUT2, label: 'J4[11]/TOUCH_TSI_5'} - {pin_num: '4', pin_signal: TSI0_CH4/PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1, label: 'D4[1]/RGB_RED', identifier: LED_RED} - {pin_num: '5', pin_signal: TSI0_CH3/PTE11/PWT_IN1/LPTMR0_ALT1/FXIO_D5/TRGMUX_OUT5, label: 'J2[15]/J21[10]/FLEXIO_5/TOUCH_EXT_2'} - {pin_num: '6', pin_signal: TSI0_CH2/PTE10/CLKOUT/FXIO_D4/TRGMUX_OUT4, label: 'J2[17]/J21[9]/FLEXIO_4/TOUCH_EXT_3'} - {pin_num: '8', pin_signal: TSI0_CH0/PTE5/TCLK2/FTM2_QD_PHA/FTM2_CH3/FXIO_D7/EWM_IN, label: 'J4[1]/TOUCH_TSI_0'} - {pin_num: '9', pin_signal: TSI0_CH1/PTE4/BUSOUT/FTM2_QD_PHB/FTM2_CH2/FXIO_D6/EWM_OUT_b, label: 'J4[3]/TOUCH_TSI_1'} - {pin_num: '15', pin_signal: EXTAL/PTB7/LPI2C0_SCL, label: 'Y1[1]/EXTAL', identifier: EXTAL} - {pin_num: '16', pin_signal: XTAL/PTB6/LPI2C0_SDA, label: 'Y1[3]/XTAL', identifier: XTAL} - {pin_num: '18', pin_signal: TSI0_CH24/PTE3/FTM0_FLT0/LPUART2_RTS/TRGMUX_IN6, label: 'J2[19]/TOUCH_EXT_4'} - {pin_num: '19', pin_signal: PTE12/FTM0_FLT3/LPUART2_TX, label: 'J20[3]/BLUETOOTH_UART2_TX', identifier: BLUETOOTH_UART_TX} - {pin_num: '20', pin_signal: PTD17/FTM0_FLT2/LPUART2_RX, label: 'J20[4]/BLUETOOTH_UART2_RX', identifier: BLUETOOTH_UART_RX} - {pin_num: '21', pin_signal: PTD16/FTM0_CH1, label: 'D4[4]/RGB_GREEN', identifier: LED_GREEN} - {pin_num: '22', pin_signal: PTD15/FTM0_CH0, label: 'D4[3]/RGB_BLUE', identifier: LED_BLUE} - {pin_num: '23', pin_signal: DAC0_OUT/PTE9/FTM0_CH7/LPUART2_CTS, label: 'J1[10]/Arduino_D4'} - {pin_num: '25', pin_signal: PTD13/RTC_CLKOUT, label: 'J6[3]/RF_GPIO_CE'} - {pin_num: '26', pin_signal: ACMP0_IN3/TSI0_CH11/PTE8/FTM0_CH6, label: 'J2[2]/Arduino_D8'} - {pin_num: '27', pin_signal: TSI0_CH9/PTB5/FTM0_CH5/LPSPI0_PCS1/TRGMUX_IN0/ACMP1_OUT, label: 'J4[5]/TOUCH_TSI_2'} - {pin_num: '28', pin_signal: ACMP1_IN2/TSI0_CH8/PTB4/FTM0_CH4/LPSPI0_SOUT/TRGMUX_IN1, label: 'J4[7]/TOUCH_TSI_3'} - {pin_num: '29', pin_signal: ADC0_SE11/ACMP0_IN4/EXTAL32/PTC3/FTM0_CH3, label: 'Y2[1]/EXTAL32', identifier: EXTAL32} - {pin_num: '30', pin_signal: ADC0_SE10/ACMP0_IN5/XTAL32/PTC2/FTM0_CH2, label: 'Y2[2]/XTAL32', identifier: XTAL32} - {pin_num: '31', pin_signal: TSI0_CH10/PTD7/LPUART2_TX/FTM2_FLT3, label: 'J4[9]/TOUCH_TSI_4'} - {pin_num: '32', pin_signal: TSI0_CH7/PTD6/LPUART2_RX/FTM2_FLT2, label: 'J2[13]/TOUCH_EXT_1'} - {pin_num: '33', pin_signal: TSI0_CH6/PTD5/FTM2_CH3/LPTMR0_ALT2/PWT_IN2/TRGMUX_IN7, label: 'J2[11]/TOUCH_EXT_0'} - {pin_num: '34', pin_signal: PTD12/FTM2_CH2/LPI2C1_HREQ/LPUART2_RTS, label: 'J1[6]/Arduino_D2'} - {pin_num: '35', pin_signal: PTD11/FTM2_CH1/FTM2_QD_PHA/LPUART2_CTS, label: 'J3[3]/MC_ENC_A'} - {pin_num: '36', pin_signal: PTD10/FTM2_CH0/FTM2_QD_PHB, label: 'J3[1]/MC_ENC_B'} - {pin_num: '39', pin_signal: ADC0_SE9/ACMP1_IN3/TSI0_CH23/PTC1/FTM0_CH1, label: 'E2[1]/TOUCH_PAD_1_TSI_23', identifier: TSI_ELECTRODE_2} - {pin_num: '40', pin_signal: ADC0_SE8/ACMP1_IN4/TSI0_CH22/PTC0/FTM0_CH0, label: 'E1[1]/TOUCH_PAD_0_TSI_22', identifier: TSI_ELECTRODE_1} - {pin_num: '41', pin_signal: ACMP1_IN5/PTD9/LPI2C1_SCL/FTM2_FLT3, label: 'J2[20]/Arduino_D15'} - {pin_num: '42', pin_signal: PTD8/LPI2C1_SDA/FTM2_FLT2, label: 'J2[18]/Arduino_D14'} - {pin_num: '43', pin_signal: ADC0_SE15/PTC17/FTM1_FLT3/LPI2C1_SCLS, label: 'J21[3]/FLEXIO_ADC'} - {pin_num: '45', pin_signal: ADC0_SE13/PTC15/FTM1_CH3, label: 'J1[8]/Arduino_D3'} - {pin_num: '46', pin_signal: ADC0_SE12/PTC14/FTM1_CH2, label: 'J1[3]/MC_ENC_I'} - {pin_num: '47', pin_signal: ADC0_SE7/TSI0_CH21/PTB3/FTM1_CH1/LPSPI0_SIN/FTM1_QD_PHA/TRGMUX_IN2, label: 'J2[9]/RC_ADC0_SE7/MC_CUR_DCB'} - {pin_num: '48', pin_signal: ADC0_SE6/TSI0_CH20/PTB2/FTM1_CH0/LPSPI0_SCK/FTM1_QD_PHB/TRGMUX_IN3, label: 'J2[5]/MC_BEMF_C/CUR_C'} - {pin_num: '53', pin_signal: ADC0_SE5/PTB1/LPUART0_TX/LPSPI0_SOUT/TCLK0, label: 'J2[3]/MC_BEMF_B/CUR_B'} - {pin_num: '54', pin_signal: ADC0_SE4/PTB0/LPUART0_RX/LPSPI0_PCS0/LPTMR0_ALT3/PWT_IN3, label: 'J2[1]/MC_BEMF_A/CUR_A'} - {pin_num: '55', pin_signal: PTC9/LPUART1_TX/LPUART0_RTS, label: 'J1[4]/Arduino_D1_UART0_TX'} - {pin_num: '56', pin_signal: PTC8/LPUART1_RX/LPUART0_CTS, label: 'J1[2]/Arduino_D0_UART0_RX'} - {pin_num: '57', pin_signal: ADC0_SE3/ACMP1_IN1/PTA7/FTM0_FLT2/RTC_CLKIN/LPUART1_RTS, label: 'J4[8]/Arduino_A3_ADC0_SE3'} - {pin_num: '58', pin_signal: ADC0_SE2/ACMP1_IN0/PTA6/FTM0_FLT1/LPSPI1_PCS1/LPUART1_CTS, label: 'J4[6]/Arduino_A2_ADC0_SE2'} - {pin_num: '59', pin_signal: PTE7/FTM0_CH7, label: 'J2[4]/Arduino_D9'} - {pin_num: '62', pin_signal: PTA17/FTM0_CH6/EWM_OUT_b, label: 'J1[16]/Arduino_D7'} - {pin_num: '63', pin_signal: PTB17/FTM0_CH5/LPSPI1_PCS3, label: 'J3[5]/J6[4]/MC_PWM_CB/RF_SPI1_PCS3'} - {pin_num: '64', pin_signal: PTB16/FTM0_CH4/LPSPI1_SOUT, label: 'J3[7]/J6[6]/MC_PWM_CT/RF_SPI1_SOUT'} - {pin_num: '65', pin_signal: PTB15/FTM0_CH3/LPSPI1_SIN, label: 'J3[9]/J6[7]/MC_PWM_BB/RF_SPI1_SIN'} - {pin_num: '66', pin_signal: ADC1_SE9/PTB14/FTM0_CH2/LPSPI1_SCK, label: 'J3[11]/J6[5]/MC_PWM_BT/RF_SPI1_SCK'} - {pin_num: '67', pin_signal: ADC1_SE8/PTB13/FTM0_CH1, label: 'J3[13]/J6[8]/MC_PWM_AB/RF_GPIO_IRQ'} - {pin_num: '68', pin_signal: ADC1_SE7/PTB12/FTM0_CH0, label: 'J3[15]/MC_PWM_AT'} - {pin_num: '69', pin_signal: ADC1_SE6/PTD4/FTM0_FLT3, label: THERM_1, identifier: THERM_1} - {pin_num: '70', pin_signal: ADC1_SE3/PTD3/LPSPI1_PCS0/FXIO_D5/TRGMUX_IN4/NMI_b, label: SW3, identifier: SW3} - {pin_num: '71', pin_signal: ADC1_SE2/PTD2/LPSPI1_SOUT/FXIO_D4/TRGMUX_IN5, label: THERM_0, identifier: THERM_0} - {pin_num: '72', pin_signal: ADC1_SE1/PTA3/LPI2C0_SCL/EWM_IN/LPUART0_TX, label: 'J4[12]/Arduino_A5_ADC1_SE1/FXOS_SCL', identifier: ACCEL_I2C_SCL} - {pin_num: '73', pin_signal: ADC1_SE0/PTA2/LPI2C0_SDA/EWM_OUT_b/LPUART0_RX, label: 'J4[10]/Arduino_A4_ADC1_SE0/FXOS_SDA', identifier: ACCEL_I2C_SDA} - {pin_num: '74', pin_signal: PTB11/LPI2C0_HREQ, label: SW2, identifier: SW2} - {pin_num: '75', pin_signal: PTB10/LPI2C0_SDAS, label: 'U1[2]/FXOS_INT', identifier: ACCEL_INT} - {pin_num: '76', pin_signal: PTB9/LPI2C0_SCLS, label: 'U1[3]/FXOS_RST', identifier: ACCEL_RST} - {pin_num: '78', pin_signal: ADC0_SE1/ACMP0_IN1/TSI0_CH18/PTA1/FTM1_CH1/LPI2C0_SDAS/FXIO_D3/FTM1_QD_PHA/LPUART0_RTS/TRGMUX_OUT0, label: 'J4[4]/J21[4]/Arduino_A1_ADC0_SE1/FLEXIO_TIMER'} - {pin_num: '79', pin_signal: ADC0_SE0/ACMP0_IN0/TSI0_CH17/PTA0/FTM2_CH1/LPI2C0_SCLS/FXIO_D2/FTM2_QD_PHA/LPUART0_CTS/TRGMUX_OUT3, label: 'J4[2]/Arduino_A0_ADC0_SE0'} - {pin_num: '80', pin_signal: ADC1_SE5/TSI0_CH16/PTC7/LPUART1_TX, label: UART1_TX_TGTMCU, identifier: DEBUG_UART_TX} - {pin_num: '81', pin_signal: ADC1_SE4/TSI0_CH15/PTC6/LPUART1_RX, label: UART1_RX_TGTMCU, identifier: DEBUG_UART_RX} - {pin_num: '82', pin_signal: PTA16/FTM1_CH3/LPSPI1_PCS2, label: 'J1[14]/Arduino_D6'} - {pin_num: '83', pin_signal: PTA15/FTM1_CH2/LPSPI0_PCS3, label: 'J2[6]/Arduino_D10_SPI0_PCS3'} - {pin_num: '84', pin_signal: ADC1_SE11/PTE6/LPSPI0_PCS2/LPUART1_RTS, label: 'J2[7]/MC_VOLT_DCB'} - {pin_num: '85', pin_signal: ADC1_SE10/TSI0_CH19/PTE2/LPSPI0_SOUT/LPTMR0_ALT3/PWT_IN3/LPUART1_CTS, label: 'J2[8]/Arduino_D11_SPI0_SOUT'} - {pin_num: '91', pin_signal: PTA11/LPUART0_RX/FXIO_D1, label: 'J21[6]/FLEXIO_1'} - {pin_num: '92', pin_signal: PTA10/LPUART0_TX/FXIO_D0, label: 'J21[5]/FLEXIO_0'} - {pin_num: '93', pin_signal: TSI0_CH14/PTE1/LPSPI0_SIN/LPI2C0_HREQ/LPI2C1_SCL, label: 'J2[10]/Arduino_D12_SPI0_SIN'} - {pin_num: '94', pin_signal: TSI0_CH13/PTE0/LPSPI0_SCK/TCLK1/LPI2C1_SDA/FTM1_FLT2, label: 'J2[12]/Arduino_D13_SPI0_SCK'} - {pin_num: '95', pin_signal: TSI0_CH12/PTC5/FTM2_CH0/RTC_CLKOUT/LPI2C1_HREQ/FTM2_QD_PHB, label: 'J1[12]/Arduino_D5'} - {pin_num: '96', pin_signal: ACMP0_IN2/PTC4/FTM1_CH0/RTC_CLKOUT/EWM_IN/FTM1_QD_PHB/SWD_CLK, label: 'J7[1]/J17[4]/SWD_CLK'} - {pin_num: '97', pin_signal: PTA5/TCLK1/RESET_b, label: 'J3[6]/J10[3]/U12[7]/J17[10]/RESET/RST_TGTMCU_b'} - {pin_num: '98', pin_signal: PTA4/ACMP0_OUT/EWM_OUT_b/SWD_DIO, label: 'J17[2]/SWD_DIO_TGTMCU'} - {pin_num: '99', pin_signal: PTA9/FXIO_D7/FTM1_FLT3, label: 'J21[12]/FLEXIO_7'} - {pin_num: '100', pin_signal: PTA8/FXIO_D6, label: 'J21[11]/FLEXIO_6'} - {pin_num: '10', pin_signal: VDD10, label: VDD_KE15Z} - {pin_num: '38', pin_signal: VDD39, label: VDD_KE15Z} - {pin_num: '61', pin_signal: VDD62, label: VDD_KE15Z} - {pin_num: '87', pin_signal: VDD88, label: VDD_KE15Z} - {pin_num: '12', pin_signal: VREFH, label: VDD_KE15Z} - {pin_num: '13', pin_signal: VREFL, label: GND} - {pin_num: '11', pin_signal: VDDA, label: VDD_KE15Z} - {pin_num: '14', pin_signal: VSS15, label: GND} - {pin_num: '37', pin_signal: VSS38, label: GND} - {pin_num: '60', pin_signal: VSS61, label: GND} - {pin_num: '86', pin_signal: VSS87, label: GND} - {pin_num: '88', pin_signal: PTA14/FTM0_FLT0/EWM_IN/BUSOUT, label: NC} - {pin_num: '89', pin_signal: PTA13/LPI2C1_SCLS, label: NC} - {pin_num: '90', pin_signal: PTA12/LPI2C1_SDAS, label: NC} - {pin_num: '77', pin_signal: PTB8, label: NC} - {pin_num: '49', pin_signal: PTC13, label: NC} - {pin_num: '50', pin_signal: PTC12, label: NC} - {pin_num: '51', pin_signal: PTC11, label: NC} - {pin_num: '52', pin_signal: PTC10, label: NC} - {pin_num: '44', pin_signal: ADC0_SE14/PTC16/FTM1_FLT2/LPI2C1_SDAS, label: NC} - {pin_num: '24', pin_signal: PTD14/CLKOUT, label: NC} - {pin_num: '17', pin_signal: PTE14/FTM0_FLT1, label: NC} - {pin_num: '7', pin_signal: PTE13, label: NC} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ #include "fsl_common.h" #include "fsl_port.h" #include "fsl_gpio.h" #include "pin_mux.h" /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitBootPins * Description : Calls initialization functions. * * END ****************************************************************************************************************/ void BOARD_InitBootPins(void) { BOARD_InitPins(); BOARD_InitDEBUG_UARTPins(); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitPins: - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: [] * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitPins(void) { } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitTOUCHPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '40', peripheral: TSI, signal: 'CH, 22', pin_signal: ADC0_SE8/ACMP1_IN4/TSI0_CH22/PTC0/FTM0_CH0, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '39', peripheral: TSI, signal: 'CH, 23', pin_signal: ADC0_SE9/ACMP1_IN3/TSI0_CH23/PTC1/FTM0_CH1, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitTOUCHPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitTOUCHPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortC); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port C */ PORTC, /* Digital filter is configured for PORTC0 */ PORT_DFER_DFE_0_MASK /* Digital filter is configured for PORTC1 */ | PORT_DFER_DFE_1_MASK, /* Disable digital filter */ false); const port_pin_config_t TSI_ELECTRODE_1 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as TSI0_CH22 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTC0 (pin 40) is configured as TSI0_CH22 */ PORT_SetPinConfig(BOARD_TSI_ELECTRODE_1_PORT, BOARD_TSI_ELECTRODE_1_PIN, &TSI_ELECTRODE_1); const port_pin_config_t TSI_ELECTRODE_2 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as TSI0_CH23 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTC1 (pin 39) is configured as TSI0_CH23 */ PORT_SetPinConfig(BOARD_TSI_ELECTRODE_2_PORT, BOARD_TSI_ELECTRODE_2_PIN, &TSI_ELECTRODE_2); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitBUTTONSPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '74', peripheral: GPIOB, signal: 'GPIO, 11', pin_signal: PTB11/LPI2C0_HREQ, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '70', peripheral: GPIOD, signal: 'GPIO, 3', pin_signal: ADC1_SE3/PTD3/LPSPI1_PCS0/FXIO_D5/TRGMUX_IN4/NMI_b, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitBUTTONSPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitBUTTONSPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortB); /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortD); gpio_pin_config_t SW2_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTB11 (pin 74) */ GPIO_PinInit(BOARD_SW2_GPIO, BOARD_SW2_PIN, &SW2_config); gpio_pin_config_t SW3_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTD3 (pin 70) */ GPIO_PinInit(BOARD_SW3_GPIO, BOARD_SW3_PIN, &SW3_config); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port B */ PORTB, /* Digital filter is configured for PORTB0 */ PORT_DFER_DFE_11_MASK, /* Disable digital filter */ false); const port_pin_config_t SW2 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTB11 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB11 (pin 74) is configured as PTB11 */ PORT_SetPinConfig(BOARD_SW2_PORT, BOARD_SW2_PIN, &SW2); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port D */ PORTD, /* Digital filter is configured for PORTD0 */ PORT_DFER_DFE_3_MASK, /* Disable digital filter */ false); const port_pin_config_t SW3 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTD3 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD3 (pin 70) is configured as PTD3 */ PORT_SetPinConfig(BOARD_SW3_PORT, BOARD_SW3_PIN, &SW3); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitLEDsPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '4', peripheral: GPIOD, signal: 'GPIO, 0', pin_signal: TSI0_CH4/PTD0/FTM0_CH2/LPSPI1_SCK/FTM2_CH0/FXIO_D0/TRGMUX_OUT1, direction: OUTPUT, gpio_init_state: 'true', drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '21', peripheral: GPIOD, signal: 'GPIO, 16', pin_signal: PTD16/FTM0_CH1, direction: OUTPUT, gpio_init_state: 'true', drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '22', peripheral: GPIOD, signal: 'GPIO, 15', pin_signal: PTD15/FTM0_CH0, direction: OUTPUT, gpio_init_state: 'true', drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitLEDsPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitLEDsPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortD); gpio_pin_config_t LED_RED_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTD0 (pin 4) */ GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_PIN, &LED_RED_config); gpio_pin_config_t LED_BLUE_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTD15 (pin 22) */ GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_PIN, &LED_BLUE_config); gpio_pin_config_t LED_GREEN_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 1U }; /* Initialize GPIO functionality on pin PTD16 (pin 21) */ GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_PIN, &LED_GREEN_config); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port D */ PORTD, /* Digital filter is configured for PORTD0 */ PORT_DFER_DFE_0_MASK /* Digital filter is configured for PORTD1 */ | PORT_DFER_DFE_15_MASK /* Digital filter is configured for PORTD2 */ | PORT_DFER_DFE_16_MASK, /* Disable digital filter */ false); const port_pin_config_t LED_RED = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTD0 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD0 (pin 4) is configured as PTD0 */ PORT_SetPinConfig(BOARD_LED_RED_PORT, BOARD_LED_RED_PIN, &LED_RED); const port_pin_config_t LED_BLUE = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTD15 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD15 (pin 22) is configured as PTD15 */ PORT_SetPinConfig(BOARD_LED_BLUE_PORT, BOARD_LED_BLUE_PIN, &LED_BLUE); const port_pin_config_t LED_GREEN = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTD16 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD16 (pin 21) is configured as PTD16 */ PORT_SetPinConfig(BOARD_LED_GREEN_PORT, BOARD_LED_GREEN_PIN, &LED_GREEN); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitOSCPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '15', peripheral: SCG, signal: EXTAL0, pin_signal: EXTAL/PTB7/LPI2C0_SCL, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init, digital_filter: no_init} - {pin_num: '16', peripheral: SCG, signal: XTAL0, pin_signal: XTAL/PTB6/LPI2C0_SDA, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init, digital_filter: no_init} - {pin_num: '29', peripheral: OSC32, signal: EXTAL32, pin_signal: ADC0_SE11/ACMP0_IN4/EXTAL32/PTC3/FTM0_CH3, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init, digital_filter: no_init} - {pin_num: '30', peripheral: OSC32, signal: XTAL32, pin_signal: ADC0_SE10/ACMP0_IN5/XTAL32/PTC2/FTM0_CH2, drive_strength: no_init, pull_select: no_init, pull_enable: no_init, passive_filter: no_init, digital_filter: no_init} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitOSCPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitOSCPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortB); /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortC); /* PORTB6 (pin 16) is configured as XTAL */ PORT_SetPinMux(BOARD_XTAL_PORT, BOARD_XTAL_PIN, kPORT_PinDisabledOrAnalog); /* PORTB7 (pin 15) is configured as EXTAL */ PORT_SetPinMux(BOARD_EXTAL_PORT, BOARD_EXTAL_PIN, kPORT_PinDisabledOrAnalog); /* PORTC2 (pin 30) is configured as XTAL32 */ PORT_SetPinMux(BOARD_XTAL32_PORT, BOARD_XTAL32_PIN, kPORT_PinDisabledOrAnalog); /* PORTC3 (pin 29) is configured as EXTAL32 */ PORT_SetPinMux(BOARD_EXTAL32_PORT, BOARD_EXTAL32_PIN, kPORT_PinDisabledOrAnalog); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitTHERMISTORPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '69', peripheral: ADC1, signal: 'SE, 6', pin_signal: ADC1_SE6/PTD4/FTM0_FLT3, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '71', peripheral: ADC1, signal: 'SE, 2', pin_signal: ADC1_SE2/PTD2/LPSPI1_SOUT/FXIO_D4/TRGMUX_IN5, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitTHERMISTORPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitTHERMISTORPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortD); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port D */ PORTD, /* Digital filter is configured for PORTD0 */ PORT_DFER_DFE_2_MASK /* Digital filter is configured for PORTD1 */ | PORT_DFER_DFE_4_MASK, /* Disable digital filter */ false); const port_pin_config_t THERM_0 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as ADC1_SE2 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD2 (pin 71) is configured as ADC1_SE2 */ PORT_SetPinConfig(BOARD_THERM_0_PORT, BOARD_THERM_0_PIN, &THERM_0); const port_pin_config_t THERM_1 = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as ADC1_SE6 */ kPORT_PinDisabledOrAnalog, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTD4 (pin 69) is configured as ADC1_SE6 */ PORT_SetPinConfig(BOARD_THERM_1_PORT, BOARD_THERM_1_PIN, &THERM_1); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitACCELPins: - options: {prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '75', peripheral: GPIOB, signal: 'GPIO, 10', pin_signal: PTB10/LPI2C0_SDAS, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '76', peripheral: GPIOB, signal: 'GPIO, 9', pin_signal: PTB9/LPI2C0_SCLS, direction: OUTPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '72', peripheral: LPI2C0, signal: SCL, pin_signal: ADC1_SE1/PTA3/LPI2C0_SCL/EWM_IN/LPUART0_TX, direction: OUTPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} - {pin_num: '73', peripheral: LPI2C0, signal: SDA, pin_signal: ADC1_SE0/PTA2/LPI2C0_SDA/EWM_OUT_b/LPUART0_RX, direction: INPUT, drive_strength: low, pull_select: down, pull_enable: disable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitACCELPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitACCELPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortA); /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortB); gpio_pin_config_t ACCEL_RST_config = { .pinDirection = kGPIO_DigitalOutput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTB9 (pin 76) */ GPIO_PinInit(BOARD_ACCEL_RST_GPIO, BOARD_ACCEL_RST_PIN, &ACCEL_RST_config); gpio_pin_config_t ACCEL_INT_config = { .pinDirection = kGPIO_DigitalInput, .outputLogic = 0U }; /* Initialize GPIO functionality on pin PTB10 (pin 75) */ GPIO_PinInit(BOARD_ACCEL_INT_GPIO, BOARD_ACCEL_INT_PIN, &ACCEL_INT_config); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port A */ PORTA, /* Digital filter is configured for PORTA0 */ PORT_DFER_DFE_2_MASK /* Digital filter is configured for PORTA1 */ | PORT_DFER_DFE_3_MASK, /* Disable digital filter */ false); const port_pin_config_t ACCEL_I2C_SDA = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as LPI2C0_SDA */ kPORT_MuxAlt3, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA2 (pin 73) is configured as LPI2C0_SDA */ PORT_SetPinConfig(BOARD_ACCEL_I2C_SDA_PORT, BOARD_ACCEL_I2C_SDA_PIN, &ACCEL_I2C_SDA); const port_pin_config_t ACCEL_I2C_SCL = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as LPI2C0_SCL */ kPORT_MuxAlt3, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTA3 (pin 72) is configured as LPI2C0_SCL */ PORT_SetPinConfig(BOARD_ACCEL_I2C_SCL_PORT, BOARD_ACCEL_I2C_SCL_PIN, &ACCEL_I2C_SCL); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port B */ PORTB, /* Digital filter is configured for PORTB0 */ PORT_DFER_DFE_9_MASK /* Digital filter is configured for PORTB1 */ | PORT_DFER_DFE_10_MASK, /* Disable digital filter */ false); const port_pin_config_t ACCEL_INT = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTB10 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB10 (pin 75) is configured as PTB10 */ PORT_SetPinConfig(BOARD_ACCEL_INT_PORT, BOARD_ACCEL_INT_PIN, &ACCEL_INT); const port_pin_config_t ACCEL_RST = {/* Internal pull-up/down resistor is disabled */ kPORT_PullDisable, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as PTB9 */ kPORT_MuxAsGpio, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTB9 (pin 76) is configured as PTB9 */ PORT_SetPinConfig(BOARD_ACCEL_RST_PORT, BOARD_ACCEL_RST_PIN, &ACCEL_RST); } /* clang-format off */ /* * TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* BOARD_InitDEBUG_UARTPins: - options: {callFromInitBoot: 'true', prefix: BOARD_, coreID: core0, enableClock: 'true'} - pin_list: - {pin_num: '80', peripheral: LPUART1, signal: TX, pin_signal: ADC1_SE5/TSI0_CH16/PTC7/LPUART1_TX, drive_strength: low, pull_select: up, pull_enable: enable, passive_filter: disable, digital_filter: disable} - {pin_num: '81', peripheral: LPUART1, signal: RX, pin_signal: ADC1_SE4/TSI0_CH15/PTC6/LPUART1_RX, drive_strength: low, pull_select: up, pull_enable: enable, passive_filter: disable, digital_filter: disable} * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** */ /* clang-format on */ /* FUNCTION ************************************************************************************************************ * * Function Name : BOARD_InitDEBUG_UARTPins * Description : Configures pin routing and optionally pin electrical features. * * END ****************************************************************************************************************/ void BOARD_InitDEBUG_UARTPins(void) { /* Clock Control: 0x01u */ CLOCK_EnableClock(kCLOCK_PortC); /* Configure digital filter */ PORT_EnablePinsDigitalFilter( /* Digital filter is configured on port C */ PORTC, /* Digital filter is configured for PORTC0 */ PORT_DFER_DFE_6_MASK /* Digital filter is configured for PORTC1 */ | PORT_DFER_DFE_7_MASK, /* Disable digital filter */ false); const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as LPUART1_RX */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTC6 (pin 81) is configured as LPUART1_RX */ PORT_SetPinConfig(BOARD_DEBUG_UART_RX_PORT, BOARD_DEBUG_UART_RX_PIN, &DEBUG_UART_RX); const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up resistor is enabled */ kPORT_PullUp, /* Passive filter is disabled */ kPORT_PassiveFilterDisable, /* Low drive strength is configured */ kPORT_LowDriveStrength, /* Pin is configured as LPUART1_TX */ kPORT_MuxAlt2, /* Pin Control Register fields [15:0] are not locked */ kPORT_UnlockRegister}; /* PORTC7 (pin 80) is configured as LPUART1_TX */ PORT_SetPinConfig(BOARD_DEBUG_UART_TX_PORT, BOARD_DEBUG_UART_TX_PIN, &DEBUG_UART_TX); } /*********************************************************************************************************************** * EOF **********************************************************************************************************************/