/* * Copyright 2019 NXP * All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ /*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ #ifndef _PIN_MUX_H_ #define _PIN_MUX_H_ /*! * @addtogroup pin_mux * @{ */ /*********************************************************************************************************************** * API **********************************************************************************************************************/ #if defined(__cplusplus) extern "C" { #endif /*! * @brief Calls initialization functions. * */ void BOARD_InitBootPins(void); /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ #define IOPCTL_PIO_INBUF_DI 0x00u /*!<@brief Disable input buffer function */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name FC0_RXD_SDA_MOSI_DATA (coord G4), JP21[2]/U28[3]/U9[13] @{ */ /* @} */ /*! @name FC0_TXD_SCL_MISO_WS (coord G2), J16[1]/U27[3]/U9[12] @{ */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FULLDRIVE_EN 0x0100u /*!<@brief Full drive enable */ #define IOPCTL_PIO_FUNC5 0x05u /*!<@brief Selects pin function 5 */ #define IOPCTL_PIO_FUNC6 0x06u /*!<@brief Selects pin function 6 */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name FLEXSPI0B_DATA0 (coord L2), U19[D3] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA1 (coord M2), U19[D2] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA2 (coord N1), U19[C4] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA3 (coord N2), U19[D4] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA4 (coord U1), U19[D5] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA5 (coord R2), U19[E3] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA6 (coord P3), U19[E2] @{ */ /* @} */ /*! @name FLEXSPI0B_DATA7 (coord P5), U19[E1] @{ */ /* @} */ /*! @name FLEXSPI0B_SS0_N (coord T2), U19[C2] @{ */ /* @} */ /*! @name FLEXSPI0B_SCLK (coord U3), U19[B2] @{ */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitFlexSPIFlashPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FULLDRIVE_EN 0x0100u /*!<@brief Full drive enable */ #define IOPCTL_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ #define IOPCTL_PIO_INBUF_DI 0x00u /*!<@brief Disable input buffer function */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name FLEXSPI0A_DATA0 (coord T5), U108[D3] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA1 (coord U5), U108[D2] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA2 (coord P6), U108[C4] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA3 (coord P7), U108[D4] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA4 (coord T7), U108[D5] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA5 (coord U7), U108[E3] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA6 (coord R7), U108[E2] @{ */ /* @} */ /*! @name FLEXSPI0A_DATA7 (coord T8), U108[E1] @{ */ /* @} */ /*! @name FLEXSPI0A_DQS (coord U9), U108[C3] @{ */ /* @} */ /*! @name FLEXSPI0A_SCLK (coord T9), U108[B2] @{ */ /* @} */ /*! @name FLEXSPI0A_SS0_N (coord T4), U108[A3] @{ */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitPSRAMPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ #define IOPCTL_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ #define IOPCTL_PIO_INBUF_DI 0x00u /*!<@brief Disable input buffer function */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PULLUP_EN 0x20u /*!<@brief Enable pull-up function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_PUPD_EN 0x10u /*!<@brief Enable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name SD0_D0 (coord R11), J32[7]/SD_DAT0 @{ */ /* @} */ /*! @name SD0_D1 (coord T11), J32[8]/SD_DAT1 @{ */ /* @} */ /*! @name SD0_D2 (coord U11), J32[9]/SD_DAT2 @{ */ /* @} */ /*! @name SD0_D3 (coord T12), J32[1]/SD_DAT3 @{ */ /* @} */ /*! @name SD0_CLK (coord P10), J32[5]/SD_CLK @{ */ /* @} */ /*! @name SD0_CMD (coord R9), J32[2]/SD_CMD @{ */ /* @} */ /*! @name SD0_CARD_DET_N (coord R13), J32[10]/CARD_CD/SD_CD @{ */ /* @} */ /*! @name PIO2_10 (coord T15), U23[3]/SD_RST_N @{ */ #define BOARD_INITUSDHC0PINS_SD_RST_N_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITUSDHC0PINS_SD_RST_N_PORT 2U /*!<@brief PORT device name: 2U */ #define BOARD_INITUSDHC0PINS_SD_RST_N_PIN 10U /*!<@brief 2U pin index: 10 */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitUSDHC0Pins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ #define IOPCTL_PIO_INBUF_DI 0x00u /*!<@brief Disable input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name PIO0_14 (coord A3), Q4[5] @{ */ /*! * @brief GPIO device name: GPIO */ #define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO /*! * @brief PORT device name: 0U */ #define BOARD_INITLEDSPINS_LED_GREEN_PORT 0U /*! * @brief 0U pin index: 14 */ #define BOARD_INITLEDSPINS_LED_GREEN_PIN 14U /* @} */ /*! @name PIO0_26 (coord A2), Q3[2] @{ */ #define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITLEDSPINS_LED_BLUE_PORT 0U /*!<@brief PORT device name: 0U */ #define BOARD_INITLEDSPINS_LED_BLUE_PIN 26U /*!<@brief 0U pin index: 26 */ /* @} */ /*! @name PIO0_31 (coord A11), Q4[2] @{ */ #define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITLEDSPINS_LED_RED_PORT 0U /*!<@brief PORT device name: 0U */ #define BOARD_INITLEDSPINS_LED_RED_PIN 31U /*!<@brief 0U pin index: 31 */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name PIO0_10 (coord J3), SW2 @{ */ #define BOARD_INITBUTTONSPINS_SW2_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITBUTTONSPINS_SW2_PORT 0U /*!<@brief PORT device name: 0U */ #define BOARD_INITBUTTONSPINS_SW2_PIN 10U /*!<@brief 0U pin index: 10 */ /* @} */ /*! @name PIO1_1 (coord G15), SW1 @{ */ #define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITBUTTONSPINS_SW1_PORT 1U /*!<@brief PORT device name: 1U */ #define BOARD_INITBUTTONSPINS_SW1_PIN 1U /*!<@brief 1U pin index: 1 */ /* @} */ /*! @name RESETN (coord B15), JP16[3]/JP14[2] @{ */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 */ #define IOPCTL_PIO_ANAMUX_DI 0x00u /*!<@brief Analog mux is disabled */ #define IOPCTL_PIO_FULLDRIVE_DI 0x00u /*!<@brief Normal drive */ #define IOPCTL_PIO_FULLDRIVE_EN 0x0100u /*!<@brief Full drive enable */ #define IOPCTL_PIO_FUNC0 0x00u /*!<@brief Selects pin function 0 */ #define IOPCTL_PIO_FUNC1 0x01u /*!<@brief Selects pin function 1 */ #define IOPCTL_PIO_INBUF_DI 0x00u /*!<@brief Disable input buffer function */ #define IOPCTL_PIO_INBUF_EN 0x40u /*!<@brief Enables input buffer function */ #define IOPCTL_PIO_INV_DI 0x00u /*!<@brief Input function is not inverted */ #define IOPCTL_PIO_PSEDRAIN_DI 0x00u /*!<@brief Pseudo Output Drain is disabled */ #define IOPCTL_PIO_PSEDRAIN_EN 0x0400u /*!<@brief Pseudo Output Drain is enabled */ #define IOPCTL_PIO_PULLDOWN_EN 0x00u /*!<@brief Enable pull-down function */ #define IOPCTL_PIO_PULLUP_EN 0x20u /*!<@brief Enable pull-up function */ #define IOPCTL_PIO_PUPD_DI 0x00u /*!<@brief Disable pull-up / pull-down function */ #define IOPCTL_PIO_PUPD_EN 0x10u /*!<@brief Enable pull-up / pull-down function */ #define IOPCTL_PIO_SLEW_RATE_NORMAL 0x00u /*!<@brief Normal mode */ /*! @name FC2_RTS_SCL_SSEL1 (coord B7), J28[10]/J30[6]/U6[4] @{ */ /* @} */ /*! @name FC2_CTS_SDA_SSEL0 (coord D7), J28[9]/J30[5]/J47[8]/U6[6] @{ */ /* @} */ /*! @name PIO1_5 (coord J16), J28[4]/JP30[1]/J45[22] @{ */ #define BOARD_INITACCELPINS_ACC_INT_GPIO GPIO /*!<@brief GPIO device name: GPIO */ #define BOARD_INITACCELPINS_ACC_INT_PORT 1U /*!<@brief PORT device name: 1U */ #define BOARD_INITACCELPINS_ACC_INT_PIN 5U /*!<@brief 1U pin index: 5 */ /* @} */ /*! @name PIO1_7 (coord J15), J28[2]/J45[36] @{ */ /*! * @brief GPIO device name: GPIO */ #define BOARD_INITACCELPINS_ACC_RESET_GPIO GPIO /*! * @brief PORT device name: 1U */ #define BOARD_INITACCELPINS_ACC_RESET_PORT 1U /*! * @brief 1U pin index: 7 */ #define BOARD_INITACCELPINS_ACC_RESET_PIN 7U /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 */ #if defined(__cplusplus) } #endif /*! * @} */ #endif /* _PIN_MUX_H_ */ /*********************************************************************************************************************** * EOF **********************************************************************************************************************/